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Method and corresponding memory for writing in eeprom memory

A memory, memory layer technology, used in static memory, read-only memory, information storage, etc.

Active Publication Date: 2019-12-13
STMICROELECTRONICS (ROUSSET) SAS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Here again, however, this programming mode requires a dedicated command and the user must ensure that the page concerned is in an "erased" state before receiving such a command, since otherwise the new data will be combined with the old data via a logical OR function

Method used

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  • Method and corresponding memory for writing in eeprom memory
  • Method and corresponding memory for writing in eeprom memory
  • Method and corresponding memory for writing in eeprom memory

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Embodiment Construction

[0089] exist figure 1 In , the reference DIS designates an exemplary memory device of the EEPROM type according to the invention.

[0090] This device DIS comprises a memory layer PM of memory cells CEL and a conventional programming circuit MPR and erasing circuit MEFF, a row decoder DECX and a column encoder DECY and a read circuit comprising a sense amplifier AMPL linked to a data register RDD, This conventional programming circuit MPR and erasing circuit MEFF comprises in particular a high voltage circuit HV which makes it possible to apply a high programming or erasing voltage.

[0091] The device DIS also comprises in this exemplary embodiment an ECC circuit MECC forming an error correction code mechanism of the Hamming code type, a conventional structure known per se.

[0092] The device DIS also comprises a control circuit comprising, for example, logic circuits capable of activating the conventional structure of the programming circuit MPR, the array circuit MEFF, t...

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Abstract

The present application relates to a method for writing in an EEPROM memory and to a corresponding memory. According to one mode of realization, it is proposed to automatically speed up the process by removing the erase step or the program step based on the value of the data to be written and optionally based on the value of the data present in the memory when optionally using conventional write commands write operation. The properties of Hamming codes make this possible speed-up of the write cycle within the memory readily achievable when the memory is equipped with an error-correcting code based on Hamming codes. This property consists in that, according to this property, when all bits of the bytes of a digital word grouping together n bytes are equal to zero, the check bits associated with these bytes are also equal to zero.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from French application No. 1557577, filed August 6, 2015, which is hereby incorporated by reference. technical field [0003] Embodiments of the invention relate to a method for writing in an EEPROM memory and a corresponding memory. Background technique [0004] Efforts are currently being made to produce EEPROM memories with ever higher densities, that is to say increasingly appreciable memory capacities, for example several megabits. [0005] But this leads to an increase in data transfer time. When reading, the data transfer time is determined by the transfer of the data read on the bus. When writing, the data transfer time is determined by the transfer of the data to be written on the bus and the duration of the write operation. Therefore, there is a need to reduce such data transfer times. [0006] Solutions include increasing the frequency of the bus. However, when using I...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/10G11C16/14G11C16/34
CPCG11C16/10G11C16/14G11C16/3495G06F3/061G06F3/0652G06F3/0659G06F3/0679G06F11/1068G11C29/52
Inventor F·塔耶M·巴蒂斯塔
Owner STMICROELECTRONICS (ROUSSET) SAS