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Formation method for semiconductor structure

A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve problems such as difficulty in ensuring stable performance of fin field effect transistors, and achieve the effects of being less prone to lattice dislocation and avoiding leakage current.

Active Publication Date: 2017-03-08
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Application Information

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Problems solved by technology

[0004] However, as the size of semiconductor devices continues to shrink, the manufacturing process of fin field effect transistors is challenged, and it is difficult to ensure the stable performance of fin field effect transistors

Method used

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  • Formation method for semiconductor structure

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Embodiment Construction

[0033] As mentioned in the background, as the size of semiconductor devices continues to shrink, the manufacturing process of FinFETs results in poor performance of the formed FinFETs.

[0034] After research, it is found that as the width of the fins shrinks, the lightly doped implantation process in the fins tends to cause amorphization of the fins, and the amorphization of the fins will affect the performance of the subsequently formed source and drain regions.

[0035] Please refer to figure 1 , figure 1 It is a schematic cross-sectional structure diagram of forming a lightly doped region in a fin according to an embodiment of the present invention, including: a substrate 100, the surface of the substrate 100 has a fin 101, and the surface of the substrate 100 has an isolation layer 102, and The isolation layer 102 covers part of the sidewall surface of the fin part 101; across the gate structure 103 of the fin part 101, the gate structure 103 is located on part of the si...

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Abstract

Disclosed is a formation method for a semiconductor structure. The formation method comprises the steps of providing a substrate, wherein fin parts and an isolation layer are arranged on the surface of the substrate, and a part of side wall surfaces of the fin parts are covered with the isolation layer; forming a gate electrode structure which transversely stretches over the fin parts, wherein the gate electrode structure is positioned on the partial side walls and the top surfaces of the fin parts; forming a first groove in the fin part on at least one side of the gate electrode structure; forming lightly-dope epitaxial layers in the first groove and the side wall surface of the fin part on at least one side of the gate electrode structure, wherein doped ions are arranged in the lightly-dope epitaxial layers; and forming a source region and a drain region in the lightly-dope epitaxial layers on the two sides of the gate electrode structure and in the corresponding fin parts. The performance of the formed semiconductor structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (Fin FET) is proposed i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L29/66795
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP
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