Automatic generation method and system of guidance document in high-level synthesis tool

Abstract

The invention discloses an automatic generation method and system of a guidance document in a high-level synthesis tool. The method comprises the following steps of: A: obtaining loop information in a code, directly executing a step C if a loop unrolling factor which is artificially defined is in the presence, and otherwise, executing a step B; B: according to the loop information, carrying out unrolling processing on a loop, and carrying out calculation through design space exploration to obtain the loop unrolling factor; and C: according to the loop unrolling factor obtained in the step A or the step B, generating the guidance document of the high-level synthesis tool. By use of the method, the loop unrolling factor is used for automatically generating the loop guidance document of the high-level synthesis tool, so that the high-level synthesis tool can use the loop guidance document, the processing code of the loop does not need to be artificially compiled, the workload and the pressure of design personnel are greatly reduced, and an effect for the high-level synthesis tool to generate hardware is obviously improved. The automatic generation method and system of the guidance document in the high-level synthesis tool can be widely applied to the field of computer and circuit design.

Description

Technical field [0001] The invention relates to the field of computer and circuit design, in particular to a method and system for automatically generating a guide file in a high-level synthesis tool. Background technique [0002] In modern digital integrated circuit design, there are many data-intensive applications, such as digital media processing, encryption algorithm processing, etc. These data-intensive applications will have many loop statements in high-level designs. There are a lot of researches on loop optimization in computer science fields such as compilers. [0003] For high-level synthesis, loops can be configured and optimized more flexibly in high-level synthesis. As the integration of gate circuits per unit area of ​​integrated circuits becomes higher and higher, we can sacrifice some area to obtain a faster listing cycle and better hardware performance. In the high-level synthesis process, the loop part of the program is expanded to expose more opportunities fo...

AI Technical Summary

Problems solved by technology

[0004] In today's high-level synthesis tools, manually defined methods are often used to guide loop unrolling to improve the effect of high-level synthesis, but it requires designers to have considerable experience in loop processing, and it brings additional workload to designers, which greatly Reduced design efficiency

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