Signal processing method, node controller chip and multiprocessor system
A multi-processor system and node controller technology, applied in the field of communication, can solve the problems of inability to identify, weak out-of-band spurious signals, etc., and achieve the effect of simplifying the form of the whole machine
Active Publication Date: 2020-06-26
XFUSION DIGITAL TECH CO LTD
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[0008] The embodiment of the present invention proposes a signal processing method, NC chip and multi-processor system, which can improve the transmission delay of out-of-band spurious signals, and can overcome the problem of unrecognizable out-of-band spurious signals weakened in the prior art
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[0051] The technical solutions in the embodiments of the present invention will be described below in conjunction with the accompanying drawings.
[0052] As mentioned above, during the use of the multi-processor system, it is found that some out-of-band spurious signals of the processor need to be interconnected in the whole system. Out-of-band spurious signals refer to non-service signals, such as TSC_SYNC signal and CATERR signal. Among them, the TSC_SYNC signal is used for the clock synchronization function of the processor, and the CATERR signal is used for the fatal error alarm function between the processors.
[0053] In order to facilitate the understanding and description of the embodiments of the present invention, the clock synchronization process of the processor and the fatal error alarm process of the processor are firstly described below.
[0054] 1) Processor clock synchronization process.
[0055] When a processor is hot-swapped in a multi-processor system, ...
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An embodiment of the invention provides a signal processing method, an NC chip and a multi-processor system, wherein the multi-processor system comprises at least two nodes; each node comprises at least one processor and at least one node controller NC chip; and a first pin of each processor is connected with a second pin of the corresponding NC chip. The signal processing method comprises the following steps: detecting the level state of the second pin of the first NC chip by using the first NC chip of the first node; determining a service message by using the first NC chip according to the level state, wherein the service message is used for indicating the level state; transmitting the service message to a second NC chip of a second node by the first NC chip through a high-speed link so that the second NC chip controls the level state of the second pin of the second NC chip according to the service message. By the embodiment of the invention, transmission delay of out-of-band spurious signals can be reduced effectively.
Description
technical field [0001] The present application relates to the communication field, and more specifically, to a signal processing method, a node controller (Node Controller, NC) chip and a multiprocessor system. Background technique [0002] As the processor process tends to the critical point of the quantum effect, the improvement of the performance of a single processor is increasingly constrained. Before the innovation in the basic field, the performance growth of future servers begins to be integrated with a single processor dominated by Moore's Law. The improvement of the speed is the main transition to the architecture innovation formed by stacking multiple processors. In response to this demand, multi-processor systems with stronger processing capabilities have been developed, such as Symmetric Multi-Processor (SMP) systems, Cluster systems, and Massive Parallel Processing (MPP) system, Non Uniform Memory Access (NUMA) system, and Cache Coherence Non-Uniform Memory Ac...
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IPC IPC(8): G06F15/173
CPCG06F15/17381
Inventor 吴君和刘品强黄平
Owner XFUSION DIGITAL TECH CO LTD