A clock synchronization device and method

Abstract

Disclosed in the present application are a clock synchronization device and method. The clock synchronization device comprises: N phase-frequency detectors, for determining N frequency deviations, the N phase-frequency detectors corresponding to the N frequency deviations one to one, the N phase-frequency detectors corresponding to N reference clock signals one to one, the N frequency deviations being the frequency deviations between a system clock signal and the N reference clock signals, the frequency deviation between the system clock signal and each reference clock signal being determined by the corresponding phase-frequency detector; a processor, for determining a compensation value according to the N frequency deviations determined by the N phase-frequency detectors, the compensation value being equal to the weighted average of the N frequency deviations, each frequency deviation of the N frequency deviations corresponding to one weight; and an oscillator, for generating a new system clock signal according to the compensation value determined by the processor.

Description

technical field [0001] The present invention relates to the communication field, in particular to a clock synchronization device and method. Background technique [0002] The system clock of the clock synchronization device supports multiple reference clock sources. At any time, the clock synchronization device only selects the clock signal of one of the reference clock sources for clock synchronization. [0003] figure 1 The structure of the clock synchronization circuit is shown as an example. see figure 1 , the clock synchronization circuit includes a frequency divider 101 , a phase detector 102 , a filter 103 and a voltage-controlled oscillator 104 . The clock synchronization circuit supports 4 reference clock sources. The reference clock signals provided by these four reference clock sources include: the reference clock signal RefClkA provided by reference clock source A, the reference clock signal RefClkB provided by reference clock source B, the reference clock si...

AI Technical Summary

Problems solved by technology

[0004] In the above technical solution, if the signal of the reference clock source of the clock synchronization circuit is abnormal (such as low-frequency disturbance), it may cause the system clock signal generated by the clock synchronization circuit to be abnormal.

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