Encryption and decryption device based on sm4 encryption algorithm

A cryptographic algorithm, encryption and decryption technology, applied in the field of encryption and decryption devices based on the SM4 cryptographic algorithm, can solve problems such as low performance, and achieve the effect of solving system performance degradation

Active Publication Date: 2019-12-13
BEIJING TOPSEC NETWORK SECURITY TECH +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Usually, the encryption and decryption operation module of the SM4 chip design method can only perform encryption and decryption operations one by one data source. It can obtain very high computing performance when dealing with SM4 ECB processing mode, but when dealing with feedback processing modes such as SM4 CBC / OFB become less performant

Method used

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  • Encryption and decryption device based on sm4 encryption algorithm
  • Encryption and decryption device based on sm4 encryption algorithm
  • Encryption and decryption device based on sm4 encryption algorithm

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Embodiment Construction

[0021] In order to improve the operating performance of the existing SM4 cryptographic algorithm, the present invention provides an encryption and decryption device based on the SM4 cryptographic algorithm. The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

[0022] Such as figure 1 As shown, an encryption and decryption device (encryption device for short) based on the SM4 cryptographic algorithm in an embodiment of the present invention has multiple storage units, and each storage unit is used to correspond to a CPU core connected to a multi-core CPU;

[0023] The encryption and decryption device receives a CPU core data source through each storage unit, and performs concurrent SM4 cryptographic algorithm encryption and decryption operations based on t...

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Abstract

The invention discloses an encryption and decryption device based on an SM4 cryptographic algorithm. The encryption and decryption device comprises multiple storage units, wherein each storage unit is used for being correspondingly connected with one CPU core of a multi-core CPU; the encryption and decryption device receives a data source of each CPU core through the corresponding storage unit, performs concurrent encryption and decryption operation of the SM4 cryptographic algorithm on the basis of received data sources of all the CPU cores and returns encryption and decryption operation result data to each CPU core through the corresponding storage unit. According to the device, an external interface is designed in a multi-queue storage mode, seamless joint with the multi-core CPU can be realized, the problem that system performance is reduced due to competition of SM4 algorithm dispatching units among the multiple cores of the CPU is solved, and the operation performance of the conventional SM4 cryptographic algorithm is improved effectively.

Description

Technical field [0001] The present invention relates to the field of hardware realization of national secret commercial cryptographic algorithms, in particular to an encryption and decryption device based on SM4 cryptographic algorithms. Background technique [0002] SM4 block symmetric cipher algorithm is a commercial cipher algorithm in my country. The block data length of this algorithm is 128 bits, and the key data length is 128 bits. It has a wide range of applications in data encryption and decryption. For example, encryption and decryption of data storage, encryption and decryption of data communication, etc., all need to perform packet symmetric encryption and decryption operations on data. [0003] For the hardware implementation of the SM4 grouping symmetric algorithm chip, it is usually a hardware design method of CPU+SM4 chip, and the CPU directly or indirectly controls and dispatches the SM4 chip. When the CPU needs to implement one or more data sources to perform SM4...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H04L9/06
CPCH04L9/0618H04L9/0631
Inventor周志伟
OwnerBEIJING TOPSEC NETWORK SECURITY TECH