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FPGA-based micro inertia measurement combination circuit

A technology of micro-inertia measurement and combination circuit, which is applied in the electronic field, can solve the problems of low driving frequency, large structure size, difficulty in reading and testing, etc., and achieve the effect of stable and reliable operation and easy maintenance and management

Inactive Publication Date: 2017-06-20
韩会义
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The direct digital circuit driving method can obtain high-speed driving frequency, but the logic design is more complicated, and it is difficult to read and test; the single-chip design can flexibly adjust the timing, and the programming is simple, but the driving frequency is low; the EPROM driving method has a simple and clear structure and is easy to debug. The disadvantage is that the structure size is larger

Method used

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  • FPGA-based micro inertia measurement combination circuit
  • FPGA-based micro inertia measurement combination circuit
  • FPGA-based micro inertia measurement combination circuit

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Embodiment Construction

[0017] The present invention will be further described below in conjunction with drawings and embodiments.

[0018] Such as figure 1 , the control module of the drive circuit sets the integral time and selects the working mode by receiving the control command. The integration time module realizes the charge accumulation of the CCD photosensitive array by setting the photosensitive integration time of the CCD. In single-channel or dual-channel mode, the timing generation circuit generates the driving timing required by the CCD, and inputs the drive chip ElM57. The level reference is provided by the voltage bias circuit, so that the drive pulse output by EL7457 meets the level requirements of the CCD47-l0 drive pulse, and realizes the transfer and output of the accumulated charge.

[0019] Such as figure 2 , the control module receives the commands sent by the upper-level system, uses the state machine to complete the analysis of the commands, and realizes imaging control, i...

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Abstract

A FPGA-based micro inertia measurement combination circuit is provided. The core device of the hardware circuit of the FPGA-based micro inertia measurement combination circuit is a FPGA. The key part circuit of a micro inertia measurement combination is integrated into the FPGA chip so as to achieve small size, light weight, fast speed and high circuit reliability. Because the FPGA has an online programmable ability, an on-chip system can be reconfigured by software, and the structure and parameters of the system can be modified according to the different sensitive components and different algorithms. Therefore, the hardware architecture of the micro inertia measurement combined has a strong versatility.

Description

[0001] Technical field [0002] The invention relates to an FPGA-based micro inertial measurement combination circuit, which is suitable for the electronic field. Background technique [0003] According to different structures and processes, CCDs are divided into front-illuminated and back-illuminated. In the front-illuminated ccD, the light is incident from the side of the electrode, the quantum efficiency of the CCD is low, and the short-wave response is poor, which cannot meet the detection and imaging requirements in many aspects. In the back-illuminated CCD, the light is incident from the back without electrodes, the quantum efficiency is high, and the response sensitivity to short waves is relatively good. Back-illuminated CCD has important application significance for low-light and short-wave detection and imaging. The drive signal controls the integration time, charge collection and charge transfer of the CCD, which has a great influence on the output signal quality ...

Claims

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Application Information

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IPC IPC(8): H04N5/372G05B19/042
CPCG05B19/042H04N25/71
Inventor 韩会义
Owner 韩会义