Flash memory
A technology of flash memory and data, which is applied in the field of high-efficiency programming flash memory, and can solve the problem of slow reading speed of flash memory
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Embodiment 1
[0013] Embodiment 1: a flash memory, comprising a serial-to-parallel conversion circuit for receiving serial data and a data judger connected to the output of the serial-to-parallel conversion circuit, the data judger includes a digital-to-analog converter, a level A shifter and a reverse circuit, the digital-to-analog converter is connected to the output end of the serial-to-parallel conversion circuit, the level shifter is connected to the output end of the digital-to-analog converter, and is used for level-shifting the initial control signal Outputting the reverse control signal, the serial-to-parallel conversion circuit converts the serial data into parallel data, and the data judger generates a reverse control signal through the parallel data, and under the control of the reverse control signal After the parallel data is processed in reverse, a reverse parallel data is output to the flash memory chip.
Embodiment 2
[0014] Embodiment 2: a flash memory, including a serial-to-parallel conversion circuit for receiving serial data and a data judger connected to the output of the serial-to-parallel conversion circuit, the data judger includes a digital-to-analog converter, a level A shifter and a reverse circuit, the digital-to-analog converter is connected to the output end of the serial-to-parallel conversion circuit, the level shifter is connected to the output end of the digital-to-analog converter, and is used for level-shifting the initial control signal Outputting the reverse control signal, the serial-to-parallel conversion circuit converts the serial data into parallel data, and the data judger generates a reverse control signal through the parallel data, and under the control of the reverse control signal After the parallel data is processed in reverse, a reverse parallel data is output to the flash memory chip. The input terminal of the reverse circuit is connected to the output term...
Embodiment 3
[0015] Embodiment 3: A flash memory, comprising a serial-to-parallel conversion circuit for receiving serial data and a data judger connected to the output of the serial-to-parallel conversion circuit, the data judger includes a digital-to-analog converter, a level A shifter and a reverse circuit, the digital-to-analog converter is connected to the output end of the serial-to-parallel conversion circuit, the level shifter is connected to the output end of the digital-to-analog converter, and is used for level-shifting the initial control signal Outputting the reverse control signal, the serial-to-parallel conversion circuit converts the serial data into parallel data, and the data judger generates a reverse control signal through the parallel data, and under the control of the reverse control signal After the parallel data is processed in reverse, a reverse parallel data is output to the flash memory chip. The reverse circuit includes an inverter and a multiplexer.
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