Data processing device and data processing method

Abstract

The embodiment of the invention provides a data processing device and a data processing method. A memory and a CPU of the data processing device are integrated on one package. The data processing device comprises data particles, error checking and correcting (ECC) particles, a dual-rate synchronous dynamic random access memory (DDR) controller and a DDR physical interface PHY, wherein the data particles and the ECC particles are DDR particles with the same data bit width, the DDR PHY is connected with a data interface of the data particles and a data interface of the ECC particles, the DDR controller comprises a first checking module, a second checking module and a caching module, the first checking module and the second checking module are connected with the caching module, a first-class interface of the first checking module and a first-class interface of the second checking module are connected with the data interface of the data particles through the DDR PHY, and a second-class interface of the first checking module and a second-class interface of the second checking module are connected with the data interface of the ECC particles through the DDR PHY. Through the embodiment, the checking effect is improved, and storage space of ECC is fully utilized.

Description

technical field [0001] Embodiments of the present invention relate to the computer field, and more specifically, relate to a data processing device and a data processing method. Background technique [0002] Memory is an important part of a data processing device (the data processing device may be a CPU system). In existing data processing devices, Double Data Rate Synchronous Dynamic Random Access Memory (DDR) is often used. The media acts as memory to store the code and data the CPU needs to run. In some occasions that require high reliability, an error checking and correcting mechanism (Error Checking and Correcting, ECC) is added to the data processing device, so that the entire data processing device tends to be safe and stable during operation. In some scenarios where the demand for memory bandwidth is high and the CPU SoC package pins are limited, the memory package solution is often used. Combine below Figure 1 to Figure 3 A detailed description is given of the da...

AI Technical Summary

Problems solved by technology

Generally speaking, 64-bit data can be verified by using 8-bit ECC check codes. Therefore, in ECC granules, only half of the storage space is used to store ECC check codes, while the other half is idle. not being used

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