Floating-point multiplier and floating-point multiplication for neural network processor

Abstract

The present invention discloses a floating-point multipliers and floating-point multiplication for a neural network processor. The floating-point multiplier matches the mantissas of two to-be-multiplied operands to select different operation modes to obtain the mantissa of the product, and directly outputs the mantissa of one of the operands when the mantissas of the two operands match the upper four bits; when the mantissas of the two operands match the upper three bits, the partial bits of the mantissa of the two operands are first truncated, the high bit of the truncated numbers is complemented by one, and then the multiplication is performed and the result is output; and if the condition is not satisfied, the mantissas of these two operands are multiplied to obtain the mantissa of the product. According to the floating-point multiplier disclosed by the present invention, in the implementation of the multiplication operation, a combination manner of approximate calculation and accurate calculation is used, and data replacement, partial bit multiplication, and other work with lower energy loss are used, so that without sacrificing greater working precision, the working efficiency of the multiplication operation is improved, and neural network processing system performance can be more efficient.

Description

technical field [0001] The present invention relates to neural network processors, and more particularly to multiplication operations within neural network processors. Background technique [0002] At present, neural network processors usually use trained weight data as input signals to perform calculation operations on neural network models. Multiplication and addition operations are important links in neural network operations. In order to reduce design complexity and improve operational efficiency, most dedicated hardware accelerators usually use fixed-point multipliers for multiplication operations, and most of the weight data obtained from training are calculated in floating points. environment, the mismatch of data storage and computing forms between the training environment and the hardware acceleration environment leads to a large difference between the hardware acceleration processing results and the training results. However, if the traditional floating-point mult...

AI Technical Summary

Problems solved by technology

Multiplication and addition operations are important links in neural network operations. In order to reduce design complexity and improve operational efficiency, most dedicated hardware accelerators usually use fixed-point multipliers for multiplication operations, and most of the weight data obtained from training are calculated in floating points. environment, the mismatch of data storage and calculation forms between the training environment and the hardware acceleration environment leads to a large difference between the hardware acceleration processing results and the training results

However, if the traditional floating-point multiplier is used in the hardware accelerator, it will cause problems such as reduced acceleration efficiency, high hardware overhead, and increased operating power consumption, which seriously hinders the application of neural network processors in embedded devices. The demand for real-time analysis and processing of data using neural network processors in future ultra-low power IoT end nodes

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