A self-test method and device for non-volatile memory

A non-volatile memory technology, applied in the field of memory, can solve the problems of rising cost of memory products and high test cost, and achieve the effects of reducing requirements, improving output efficiency, and simplifying the burn-in test process

Active Publication Date: 2020-08-07
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the above problems, the purpose of the embodiment of the present invention is to provide a non-volatile memory self-test method and a non-volatile memory self-test device, to solve the high test cost of the existing burn-in test method, resulting in memory products The problem of rising costs

Method used

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  • A self-test method and device for non-volatile memory
  • A self-test method and device for non-volatile memory
  • A self-test method and device for non-volatile memory

Examples

Experimental program
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Effect test

Embodiment 1

[0027] refer to figure 2 , shows a flow chart of the steps of a non-volatile memory self-test method embodiment of the present invention, the non-volatile memory includes a self-test controller, the self-test controller can be embedded or integrated in the non-volatile memory, the non-volatile memory The volatile memory and the test equipment can be connected through a data interface, and the self-test method can specifically include the following steps:

[0028] S21, receiving a start-up self-test instruction sent by the test device through the non-volatile memory.

[0029] Wherein, the non-volatile memory (NVRAM, Non-volatile memory) refers to a memory whose stored information will not disappear when the system is shut down or there is no power supply. For example, EPROM (Erasable Programmable Read-Only Memory, Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory, Electronically Erasable Programmable Read-Only Memory, Flash m...

Embodiment 2

[0040] refer to image 3 , shows a flow chart of the steps of another non-volatile memory self-test method embodiment of the present invention, the non-volatile memory may include a self-test controller, the non-volatile memory is connected to the test equipment, and the self-test method may specifically be Including the following steps:

[0041] S31, receiving a start-up self-test instruction sent by the test device through the non-volatile memory.

[0042] S32, start the self-test controller, determine the maximum number of tests and each item to be tested of the non-volatile memory; determine the maximum number of tests and each item to be tested of the non-volatile memory, which may include:

[0043] S321. Obtain data corresponding to the maximum number of tests and data corresponding to each item to be tested from the second preset storage space of the non-volatile memory.

[0044] S322. Determine the maximum number of tests according to the data corresponding to the ma...

Embodiment 3

[0058] refer to Figure 4 , shows a flow chart of the steps of another non-volatile memory self-test method embodiment of the present invention, the non-volatile memory may include a self-test controller, the non-volatile memory is connected to the test equipment, and the self-test method may specifically be Including the following steps:

[0059] S41, receiving a start-up self-test instruction sent by the test device through the non-volatile memory.

[0060] S42, start the self-test controller, determine the maximum number of tests and each item to be tested of the non-volatile memory; determine the maximum number of tests and each item to be tested of the non-volatile memory, which may include:

[0061]S421. Obtain data corresponding to the maximum number of tests and data corresponding to each item to be tested from the instruction to start the burn-in self-test.

[0062] Specifically, the command to start the self-test may be any command sequence that causes the self-tes...

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Abstract

The invention provides a self-testing method and device for a non-volatile memory. The non-volatile memory comprises a self-testing controller and is connected with test equipment. The method comprises the steps that a self-testing starting instruction sent by the test equipment is received through the non-volatile memory; the self-testing controller is started, and a maximum number of tests and all to-be-tested items of the non-volatile memory are determined; the non-volatile memory is tested according to all the to-be-tested items through the self-testing controller till the number of tests on all the to-be-tested items is equal to the maximum number of tests or till a test result of any to-be-tested item is that the non-volatile memory is invalid; and if the test result of any to-be-tested item is that the non-volatile memory is invalid, corresponding item invalidation information is recorded into a first preset storage space of the non-volatile memory through the self-testing controller. Through the self-testing method and device, an aging test is easy and convenient to perform, the requirement of the aging test on the test equipment is substantially lowered, and test cost is lower.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a non-volatile memory self-test method and a non-volatile memory self-test device. Background technique [0002] Due to the large capacity and high device density of memory, there is a serious problem of early failure. This problem is exacerbated as process geometries shrink. The relationship between the failure probability of the memory and the number of uses is consistent with figure 1 The characteristic of the bathtub curve shown is that the failure probability of the memory is high at the beginning of use, and the failure probability of the memory will be greatly reduced after a certain number of uses, until the service life of the memory is reached, the failure probability of the memory will continue to increase. The reliability of the memory can be improved through the burn-in test. The burn-in test is to repeatedly erase, write, read and other operations on the memory be...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/12G11C29/56
CPCG11C29/12G11C29/56G11C2029/5606
Inventor 胡洪
Owner GIGADEVICE SEMICON (BEIJING) INC
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