Scheduling Method for Reconfigurable Computing Structure Based on Arbitrary Dimension Matrix Multiplication

Abstract

The invention belongs to the technical field of matrix calculation, and particularly relates to a scheduling method for a reconfigurable calculation structure on the basis of arbitrary-dimension matrix multiplication. The adopted reconfigurable calculation structure of the arbitrary-dimension matrix multiplication consists of processing units, an interface controller, a scheduling module and a storage module. The method comprises the following steps that: carrying out interconnection on the processing units, and forming a reconfigurable processing array with the interface controller; designing a scheduling mechanism by the scheduling module, generating configuration information, and issuing to the reconfigurable processing array; constructing a calculation structure which meets current-dimension matrix multiplication; on the basis of the constructed calculation structure, according to the scheduling mechanism, distributing calculation data to the processing units to carry out matrix multiplication calculation; and returning a matrix multiplication calculation result to the storage module through the interface controller. By use of the method, through a way of a configurable fixed processing method, arbitrary-dimension matrix multiplication calculation is realized, and matrix multiplication calculation flexibility is improved.

Description

technical field [0001] The invention belongs to the technical field of matrix computing, and in particular relates to a scheduling method of a reconfigurable computing structure based on matrix multiplication of arbitrary dimensions. Background technique [0002] Matrix multiplication is the most basic operation in scientific computing, and is widely used in various circuit calculations, such as DCM transformation in the field of digital communication, matrix inversion, and 3D transformation in image processing. Given a matrix multiplication C=AB, where C={c ij} is an M×N-dimensional matrix, A={a ij} is an M×K-dimensional matrix, B={b ij} is a K×N-dimensional matrix, then c ij It can be expressed as: [0003] [0004] Due to the high computational complexity of matrix multiplication (usually O(n 3 )), its computing performance often directly affects the overall performance of the system. However, the early matrix multiplication was implemented by multi-processor ser...

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Problems solved by technology

However, the early matrix multiplication was mostly realized by serial calculation of the processor. With the increase of the matrix dimension, the calculation amount increased sharply, which seriously restricted the calculation speed.

The large-dimensional matrix multiplication based on hardware can give full play to the speed of the hardware, but the large-dimensional matrix multiplication requires high computing resources and storage space. The existing parallel structure design of high-performance matrix multiplication requires the construction of complex parallel models, and The implementation of the corresponding proprietary parallel structure consumes more resources, but the reusability and scalability are not ideal, and it is difficult to realize the multiplication calculation of variable-dimensional matrix; and the more general linear array is used to realize the design and execution of multiplication The time complexity is high, and the data parallelism in the multiplication calculation cannot be fully exploited; the multiplication method based on the block matrix calculation can realize the multiplication calculation of matrices of any dimension, but the current implementation method does not understand the inherent line and streamlining of the multiplication calculation. Insufficient utilization of features makes it difficult to improve computational efficiency

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