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Troubleshooting method and device for host machine running process

A fault handling method and operating process technology, applied in the direction of responding to the generation of errors, etc., can solve the problems of low degree of automation, and achieve the effect of improving convenience and automatic repair ability

Active Publication Date: 2020-12-01
深圳市恒扬数据股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In view of this, the embodiment of the present invention provides a fault handling method and device for the running process of the host, to solve the problem of low automation existing in the fault handling method for the running process of the host

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  • Troubleshooting method and device for host machine running process
  • Troubleshooting method and device for host machine running process
  • Troubleshooting method and device for host machine running process

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Embodiment Construction

[0015] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present invention. It will be apparent, however, to one skilled in the art that the invention may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0016] In order to illustrate the technical solutions of the present invention, specific examples are used below to illustrate.

[0017] Complementary Metal Oxide Semiconductor (CMOS) is a readable and writable RAM chip on the host, which is widely used to save the hardware configuration of the host and various system parameters set by the operator. Under normal circumstances, when the host encou...

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Abstract

The invention belongs to the technical field of single chip microcomputers, and especially relates to a fault processing method and device used in a host running process. The method comprises the following steps: dividing the running process into a plurality of logical stages, and setting the expected execution time for each logical stage and executing an abnormal mark corresponding to the fault setting for each logical stage; if the actual execution time of the logical stages is less than the expected execution time when the logical stages are executed and an execution result is returned successfully, then clearing the abnormal mark corresponding to the logical stage and executing the next logical stage; and if the actual execution time of the logical stages is equal to or greater than the expected execution time, or an execution fault occurs, then interrupting the running process and sending out the abnormal mark corresponding to the logical stage, clearing data stored in a CMOS (Complementary Metal Oxide Semiconductor Transistor) and restarting. The fault processing method used in the host running process provided by the invention has the active repair capacity of a board card based on statistics and analysis, and facilitates engineers to repair programs.

Description

technical field [0001] The invention belongs to the technical field of single-chip microcomputers, and in particular relates to a fault handling method and device used in the running process of a host computer. Background technique [0002] According to statistics, during the life cycle of the X86 board, there is a 1% probability of various failures such as no display, restarting after booting, or crash. The current method to deal with these failures is to manually short the CLR_CMOS jumper on the board. cap to solve. It is understandable that after the CLR_CMOS jumper is shorted, the data written in the Complementary Metal Oxide Semiconductor (CMOS) stored in the factory will be cleared, so some board failures will also occur after restarting the board. Then eliminate. [0003] However, since the current action of clearing CMOS is performed manually, many manual steps are required, such as: removing the AC adapter, removing the internal battery of the board, shorting the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/07
Inventor 汪旭
Owner 深圳市恒扬数据股份有限公司