Virtual circuit and driving circuit of flat panel display device

Abstract

A virtual circuit of a flat panel display device, comprising: a plurality of virtual scanning lines (DS1, …, DSm), which extend in the row direction and which are separate from one another; a plurality of virtual data lines (DD1, …, DDn), which extend in the column direction and which are separate from one another, the plurality of virtual data lines (DD1, ..., DDn) comprising an outermost outer virtual data line (DDn); the virtual scanning lines (DS1, …, DSm) and virtual data lines (DD1, …, DDn) intersectingly enclose to form a plurality of virtual pixel regions, the virtual pixel regions being internally provided with virtual pixel electrodes; a plurality of thin film transistors (110), which connect the virtual pixel electrodes to corresponding virtual scanning lines and virtual data lines; a part of the outer virtual data line (DDn) that corresponds to an outer terminal of at least one virtual scanning line outwardly avoids the virtual scanning line such that projections of the two on the horizontal plane are staggered. The present invention has the advantage of enhancing a short circuit of the virtual scanning lines (DS1, …, DSm) and the outer virtual data line (DDn).

Description

technical field [0001] The invention relates to the field of flat panel display, in particular to a virtual circuit and a driving circuit of a flat panel display device. Background technique [0002] With the continuous development of flat panel display technologies such as liquid crystal technology, flat panel display devices are more and more widely used in people's daily production and life. [0003] In the current flat panel display device design, in order to improve the uniformity of the display area (Active Area, AA area) of the flat panel display device, virtual circuits are usually constructed in the peripheral area of ​​the flat panel display device, see figure 1 , the dummy circuit includes a plurality of dummy scan lines DS1',..., DSm', a plurality of dummy data lines DD1',..., DDn' and a plurality of thin film transistors, and the dummy scan lines and dummy data lines cross to form a plurality of pixels area, there are dummy pixel electrodes in the pixel area. ...

AI Technical Summary

Problems solved by technology

Due to the high density of the metal film layer in the edge area of ​​the panel, a large amount of static electricity is prone to occur during the manufacturing process. Since the outer ends (right ends) of the virtual scanning lines DS1', ..., DSm' are pointed, a large amount of static electricity will be collected outside the virtual scanning lines. end, and the part of the virtual scan line not far from the outer end overlaps with the outer dummy data line DDn', and it is easy to damage the virtual scan line DS1', ..., DSm' when electrostatic discharge is performed at the end of the virtual scan line DS1', ..., The insulating layer between DSm' and the external dummy data line DDn' causes the dummy scan lines DS1', ..., DSm' and the external dummy data line DDn' to be short-circuited, causing abnormalities such as vertical bright lines or poor display

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