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A method of splitting large wire nets while maintaining the original physical wiring topology

A physical and line network technology, applied in the field of large line network, can solve the problems of violation of delay constraints, timing delay difference, and large difference in real delay value, etc., to ensure delay estimation and reduce winding length Effect

Active Publication Date: 2020-04-07
北京华大九天科技股份有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, under the advanced process conditions of 28nm and below, the impact of physical wiring on delay calculation is increasing
Moreover, for the same wire network connection, the timing delay will vary greatly under different physical routing methods, which causes a large difference between the estimated delay value of the traditional optimization scheme and the actual delay value obtained after physical implementation.
Even in extreme cases, latency issues that are expected to be successfully handled are still violated after rerouting

Method used

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  • A method of splitting large wire nets while maintaining the original physical wiring topology
  • A method of splitting large wire nets while maintaining the original physical wiring topology
  • A method of splitting large wire nets while maintaining the original physical wiring topology

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Embodiment Construction

[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0022] figure 1 In order to maintain the original physical wiring topology according to the present invention, the flow chart of the large-line network splitting method will be referred to below figure 1 A detailed description of the method for splitting a large wire network maintaining the original physical wiring topology of the present invention.

[0023] In step 101, the method of "piecewise linearization" is used to convert the large-line network into a tree topology, and the location of the strategic point is found according to the design rules.

[0024] In this step, first, read in the connection relationship and physical wiring information of the large-line network;

[002...

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Abstract

The invention discloses a big wire mesh splitting method for maintaining original physical routing topologies. The method comprises the following steps of: converting a big wire mesh into a tree topological structure and finding a strategy point position; finding an incremental layout legalization point position of the strategy point position; finding an optimum cutting point position of originalphysical routing; and inserting a buffer unit at the incremental layout legalization point position and physically connecting the buffer unit with the optimum cutting point position. According to thebig wire mesh splitting method for maintaining original physical routing topologies, the buffer unit is inserted at the incremental layout legalization point position to split the big wire mesh into aplurality of sub-wire meshes satisfying requirements, and the newly inserted buffer unit is connected at the optimum cutting point to sufficiently reusing the original connection topology and physical routing of the wire mesh, so that the wire wrapping length can be decreased to the greatest extent and then the consistency of time delay estimation and physical realization of an optimization scheme is ensured.

Description

Technical field [0001] The present invention relates to the technical field of EDA design, in particular to the process of correcting a large-line network that violates design rules in the ECO optimization stage. Background technique [0002] In order to ensure that the integrated circuit can work normally, it is necessary to pass the design rule check to ensure that the design performance meets the requirements of various rules. In the integrated circuit design, if there is a "big wire network", the probability of not meeting the delay constraints in the design rules will increase significantly. When a certain wire network has a too long wire length or too many driving loads, it will interfere with signal transmission and affect the normal operation of the circuit. [0003] Wire net splitting, that is, by inserting buffer units to drive segmented wire nets, is a common and effective method to deal with large wire nets. Normally, after the buffer unit is inserted, the physical co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/392
Inventor 傅静静董森华陈彬燕昭然刘毅
Owner 北京华大九天科技股份有限公司
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