Semiconductor apparatus and preparation method therefor

A semiconductor and conductor technology, applied in the field of NAND memory forming 3D NAND flash memory and its preparation, can solve problems such as device performance degradation

Active Publication Date: 2018-02-02
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
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In this way, NAND devices need to use a source layer instead of

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  • Semiconductor apparatus and preparation method therefor
  • Semiconductor apparatus and preparation method therefor
  • Semiconductor apparatus and preparation method therefor

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[0059] Hereinafter, the embodiments of the present invention will be described more fully with reference to the accompanying drawings, and the preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention can be implemented in different ways and should not be interpreted as being limited to the embodiments described here. The same reference numerals refer to the same elements throughout the specification.

[0060] It should be understood that although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element without departing from the scope of the present invention. As used herein, the term "and / or" includes any and all combinations of one or mo...

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Abstract

The invention relates to an NAND memory and a preparation method therefor. The NAND memory comprises a silicon substrate, a plurality of peripheral devices, a plurality of NAND strings formed above the peripheral devices, a monocrystal silicon layer formed above the multiple NAND strings, and one or more first interconnection layers formed between the multiple peripheral devices and the multiple NAND strings, wherein the monocrystal silicon layer and the multiple NAND strings are in contact connection. By manufacturing array devices and peripheral devices separately, mutual influence to the processing process of the two devices in manufacturing can be avoided, so that the problem of limitation to the post layer manufacturing by the temperature of the former layer in the prior art can be solved, thereby obtaining high peripheral device performance; and in addition, the array devices are overlaid on the peripheral devices, so that high device density is realized.

Description

technical field [0001] The invention relates to a NAND memory and a preparation method thereof, in particular to a NAND memory forming a 3D NAND flash memory and a preparation method thereof. Background technique [0002] With the continued emphasis on highly integrated electronics, there is a continuing need for semiconductor memory devices that operate at higher speeds and lower power and have increased device densities. To this end, devices with smaller dimensions and multilayer devices with transistor cells arranged in horizontal and vertical arrays have been developed. 3D NAND is an emerging type of flash memory developed by the industry. It solves the limitations of 2D or planar NAND flash memory by stacking memory particles together. [0003] The planar structure of NAND flash memory is approaching its actual expansion limit, which brings severe challenges to the semiconductor memory industry. The new 3D NAND technology stacks multiple layers of data storage cells v...

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Application Information

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IPC IPC(8): H01L27/11578H01L27/1157H01L27/11551H01L27/11524
CPCH10B41/35H10B41/20H10B43/35H10B43/20
Inventor 吕震宇陈俊朱继锋胡禺石陶谦杨士宁杨伟毅
Owner YANGTZE MEMORY TECH CO LTD
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