Semiconductor device and manufacturing method thereof, and electronic device
A manufacturing method and semiconductor technology, applied to semiconductor devices, electric solid devices, circuits, etc., can solve problems such as local depth differences, line collapse, etc., to reduce local depth differences, reduce line collapse problems, and reduce local depth difference effect
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Embodiment 1
[0041] The following will refer to figure 2 as well as Figure 3A ~ Figure 3D A method for fabricating a semiconductor device according to an embodiment of the present invention will be described in detail.
[0042] First, step 201 is performed to provide a semiconductor substrate 300 on which a patterned gate stack and an active region hard mask layer 304 are formed, the gate stack including a tunnel oxide layer 301 and floating gate 302, forming a structure such as Figure 3A shown.
[0043] Wherein, the semiconductor substrate 300 can be at least one of the materials mentioned below: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, and also includes multiple semiconductors composed of these semiconductors. The layer structure or the like may be silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). As an example, in t...
Embodiment 2
[0069] The present invention also provides a semiconductor device fabricated by the above method, such as Figure 4 As shown, the semiconductor device includes: a semiconductor substrate 400 on which a patterned gate stack and an active region hard mask layer 404 and an isolation structure 405 separating the gate stack are formed, The gate stack includes a tunnel oxide layer 401 and a floating gate 402 .
[0070] Wherein, the semiconductor substrate 400 can be at least one of the materials mentioned below: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, and also includes multiple semiconductors composed of these semiconductors. The layer structure or the like may be silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). As an example, in this embodiment, the constituent material of the semiconductor substrate 400 is selecte...
Embodiment 3
[0078] Still another embodiment of the present invention provides an electronic device, including a semiconductor device and an electronic component connected to the semiconductor device. Wherein, the semiconductor device includes: a semiconductor substrate on which gate stacks and isolation structures for separating the gate stacks are formed.
[0079] The semiconductor substrate can be at least one of the materials mentioned below: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, including multilayer structures composed of these semiconductors etc. or silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). Devices, such as NMOS and / or PMOS, can be formed on the semiconductor substrate. Similarly, a conductive member may also be formed in the semiconductor substrate, and the conductive member may be the gate, source or drain...
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