Method and device for power supply control of FPGA accelerator card auxiliary power supply, and medium

Abstract

The invention discloses a method and a device for power supply control of a FPGA accelerator card auxiliary power supply, and a medium. The steps of the method comprises: establishing a first power supply access between an auxiliary power interface and a FPGA, and a second power supply access between an auxiliary power interface and a preset component; obtaining current operation power consumptionof the FPGA, and using a preset control standard as basis, obtaining a power supply group state which meets the operation power consumption; according to the power supply group state, controlling on-off of each power supply in the power supply group, to supply power for the FPGA using the auxiliary power interface; determining whether the state of the main power interface supplying power to the preset component is a preset state, if yes, using the auxiliary power interface to supply power for the preset component. An auxiliary power supply is relatively reasonably and flexibly used, and safety operation of each component and integrated working efficiency are guaranteed. In addition, the invention also provides a device for power supply control of a FPGA accelerator card auxiliary power supply, and a medium, and beneficial effects are as described above.

Description

technical field [0001] The invention relates to the field of FPGA development, in particular to a power supply control method, device and medium for an FPGA accelerator card auxiliary power supply. Background technique [0002] FPGA chips can achieve high computing performance for specific operations including artificial neural networks, and their performance is usually higher than general-purpose processors such as CPUs or GPUs at the same power consumption, so they are often used as auxiliary processors to achieve acceleration The effect of the operation. FPGA usually needs to cooperate with the main processor to realize functions, and usually exists physically in the form of a board with a PCIE interface, which is called an FPGA accelerator card. [0003] Based on the specifications of the PCIE protocol, the design of the power supply system of the PFGA accelerator card needs to follow the restrictions of the PCIE protocol. According to different interface combinations, ...

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Problems solved by technology

[0003] Based on the specifications of the PCIE protocol, the design of the power supply system of the PFGA accelerator card needs to follow the restrictions of the PCIE protocol. According to different interface combinations, the maximum power that the slot part can provide is 75W. However, for mid-to-high-end FPGA accelerator cards, The power supply of 75W is not enough to support its normal work, and it is necessary to increase the auxiliary power supply of the PCIE interface according to the specific situation. Since the power supply of the auxiliary power supply is relatively large, but the FPGA components and other working components in the FPGA accelerator card are working. , the demand for power supply power varies according to the actual working conditions. Therefore, the current use of auxiliary power supplies is inflexible and relatively inefficient. At the same time, unreasonable use of auxiliary power supplies with high power supply will also cause damage to the FPGA accelerator card. The various components in the device bring hidden dangers to safety

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