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SPI FLASH controller based on FPGA and design method of SPI FLASH controller

A design method and controller technology, applied in the direction of CAD circuit design, instrumentation, calculation, etc., can solve problems such as increasing project cost, and achieve the effect of reducing project cost, reducing system complexity, and simple implementation method

Pending Publication Date: 2018-05-18
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, the traditional SPI FLASH controller needs to purchase additional IP in the FPGA, which will greatly increase the project cost

Method used

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  • SPI FLASH controller based on FPGA and design method of SPI FLASH controller
  • SPI FLASH controller based on FPGA and design method of SPI FLASH controller
  • SPI FLASH controller based on FPGA and design method of SPI FLASH controller

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] Present embodiment proposes the SPI FLASH controller based on FPGA, and its structure comprises:

[0040] Flag register, through software configuration flag register flag, used to mark the instruction type of SPI FLASH;

[0041] Specifically, there are six specific instruction types of SPI FLASH, including:

[0042] Type 1: Contains only instruction codes

[0043] The software needs to configure the value of the flag register (flag) to 0001;

[0044] Type 2: Contains instruction code + address

[0045] The software needs to configure the value of the flag register (flag) to 0011;

[0046] Type 3: Contains instruction code + write data

[0047] The software needs to configure the value of the flag register (flag) to 0101;

[0048] Type 4: Contains instruction code + write address + write data

[0049] The software needs to configure the value of the flag register (flag) to 0111;

[0050] Type 5: Contains instruction code + read address + read data

[0051] The so...

Embodiment 2

[0069] The FPGA-based SPI FLASH controller proposed in this embodiment is another embodiment of the present invention. On the basis of the FPGA-based SPI FLASH controller in Embodiment 1, it also includes an instruction register, an address register, and a write number register. , Read number register and write data register.

[0070] Specifically, the command register, the address register, the write count register, the read count register and the write data register are configured by software.

[0071] Correspondingly, attached figure 2 As shown, the FPGA internal setting CMD_FIFO: used to receive the value of the instruction register configured by the software through APB; the FPGA internal setting ADDR_FIFO: used to receive the value of the address register configured by the software through APB; the FPGA internal setting WR_CNT_FIFO: used to receive the The value of the write number register configured through APB; FPGA internal setting RD_CNT_FIFO: used to receive the ...

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Abstract

The invention discloses an SPI FLASH controller based on an FPGA and a design method of the SPI FLASH controller and relates to the field of computer chip design, and a marker register is configured according to the SPI FLASH instruction type software; a plurality of logic core FIFO, a state machine FSM and an SPI time sequence generation module are arranged in the FPGA; the FIFO receives the values of the register and sends the values to the state machine, and the state machine decides to read corresponding FIFO according to the content of the marker register; data read from the FIFO are converted into SPI time sequences, and the SPI time sequences are output to the SPI FLASH through an SPI interface. The state machine receives the reading return information of the SPI FLASH and caches the information to the FIFO to be read by software. The SPI FLASH controller is based on the FPGA logic design, the SPI FLASH controller is realized autonomously, the implementation method is simple, the system complexity is reduced, extra FPGA IP is not required to be purchased, and the project cost is reduced greatly.

Description

technical field [0001] The invention relates to the field of computer chip design, in particular to an FPGA-based SPI FLASH controller and a design method thereof. Background technique [0002] Traditional SPI FLASH controller, the application scene is as attached figure 1 As shown, the software configures instructions to the FPGA through the APB interface; the FPGA parses the instruction type, obtains the SPI instruction, address, and data, and then generates the SPI timing sequence, which is output to the SPI interface; the SPI output interface is connected to the SPI FLASH. At the same time, the FPGA receives the returned data from the SPI FLASHD, caches it, and waits for the software to read it. [0003] The above-mentioned FPGA (Field-Programmable Gate Array) is a field programmable logic device. APB (Advanced Peripheral Bus) is a peripheral bus. This bus protocol is one of the AMBA bus structures proposed by ARM, and has become a standard on-chip bus structure. SPI ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/34Y02D10/00
Inventor 张贞雷
Owner ZHENGZHOU YUNHAI INFORMATION TECH CO LTD