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A circuit for reading compressed image data and an anti-distortion circuit including the circuit

An image compression and anti-distortion technology, which is applied in the field of image processing, can solve problems such as bandwidth waste, image display delay, and increased display delay, and achieve real-time reading, reduced bandwidth, and reduced display delay.

Active Publication Date: 2021-06-01
ALLWINNER TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The process of anti-distortion transformation of each frame image is: read an original image from the dynamic random access memory (DRAM), process the original image according to the mapping relationship of the distortion transformation, and write it back to the dynamic random access memory after processing. In the memory (DRAM), the display module reads the distorted image from the dynamic random access memory (DRAM), so that the operation of one frame of image will go through reading one frame > writing back one frame > the display module reads one more Three-step frame, repeated reading and writing of dynamic random access memory (DRAM) will lead to waste of bandwidth and heavy GPU load
The existing technology usually reads the compressed data of a frame of original image and then performs decompression calculation and subsequent image processing, which will cause the problem of image display delay
At the same time, the image data after decompression and image processing needs to be saved to the memory, and then read and sent to the display by the display device, which increases the display delay and bandwidth consumption.

Method used

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  • A circuit for reading compressed image data and an anti-distortion circuit including the circuit
  • A circuit for reading compressed image data and an anti-distortion circuit including the circuit
  • A circuit for reading compressed image data and an anti-distortion circuit including the circuit

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Embodiment Construction

[0048] Now in conjunction with the accompanying drawings, the preferred embodiments of the present invention will be described in detail. Such as image 3 As shown, it is a circuit block diagram of a circuit 100 for reading compressed image data according to an embodiment of the present invention. The circuit 100 for reading compressed image data includes a coefficient fetching unit 10, a coordinate calculation unit 30, a compressed block header information fetching unit 50, and a fetching block header information unit 50. The data unit 70 is compressed. Get the coefficient unit 10 to read the mapping coefficient of the output image block and the original image block; the coordinate calculation unit 30 divides the original image into unit blocks of M*N pixels, M and N are positive integers greater than 1, and calculate the output according to the mapping coefficient The coordinates of the unit block of the original image corresponding to the image line; get the compressed blo...

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Abstract

The invention relates to a circuit for reading compressed image data, comprising a coefficient fetching unit, a coordinate calculation unit, a compressed block header information fetching unit and a compressed data fetching unit, the coefficient fetching unit reads the mapping coefficient between an output image block and an original image block; coordinates The calculation unit divides the original image into unit blocks of M*N pixels, M and N are positive integers greater than 1, and calculates the coordinates of the unit block of the original image corresponding to the output image line according to the mapping coefficient; the compressed block header information unit is obtained according to the output image The coordinates of the unit block of the original image corresponding to the row generate the header information address of the compressed block of the unit block, and read the header information of the compressed block according to the header information address; the compressed data unit reads the compressed data according to the header information of the compressed block block data. It realizes real-time reading of image compression data, reduces bandwidth, and reduces display delay.

Description

technical field [0001] The invention relates to the field of image processing, in particular to a circuit for reading compressed image data and an anti-distortion circuit including the circuit. Background technique [0002] In a VR system, the lens is generally used to project the image on the display screen into the user's eyes. Due to the physical characteristics of the lens itself, the image projected to the user's eyes will produce distortion and dispersion, which will affect the user experience. In order to avoid affecting the user experience, anti-distortion processing may be performed on the image transmitted to the display screen, that is, distortion processing may be performed in advance. The image sent to the display needs to be decoded from the normal shape ( figure 1 shown on the left) is distorted into a distorted shape ( figure 1 shown on the right), while when the distorted shape ( figure 2 (shown on the left) when displayed through the lens, due to the op...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T9/00G06T1/60G06T3/00G06T5/00
CPCG06T1/60G06T9/00G06T2207/20021G06T3/047G06T5/80
Inventor 范志干张俊唐禹谱
Owner ALLWINNER TECH CO LTD