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Cascade compilation method, device, storage medium and computer equipment thereof

A compilation method and cascading technology, applied in the field of communication, can solve the problems of low bit error rate and high bit error rate, and achieve the effect of meeting communication requirements, low bit error rate characteristics, and ensuring reliability.

Active Publication Date: 2021-11-02
CHINA ELECTRONICS TECH GRP NO 7 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Based on this, it is necessary to provide a cascaded compilation method, device, storage medium and computer equipment thereof with a low bit error rate for the problem of a relatively high bit error rate in general compilation methods

Method used

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  • Cascade compilation method, device, storage medium and computer equipment thereof
  • Cascade compilation method, device, storage medium and computer equipment thereof
  • Cascade compilation method, device, storage medium and computer equipment thereof

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Embodiment Construction

[0036] In order to explain in detail the technical solutions of the cascading compilation method and system of the present application, the following will first explain some related content.

[0037] RS code is a kind of multi-ary BCH (Bose, Ray, Hocquenghem) code with strong error correction ability, which can effectively correct random errors and burst errors. For bursty errors, RS codes can detect continuous bit errors using a relatively small number of symbols. The Qary-LDPC code has the following advantages: first, the error correction performance is better, because the multivariate LDPC code combines multiple bits into a multivariate symbol, which has the potential to eliminate the small and medium rings represented by the bipartite graph of the LDPC code, under iterative decoding Better error correction performance can be obtained; second, the ability to resist burst errors is strong, the binary LDPC code does not have a strong ability to resist burst errors, and the mu...

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Abstract

The application provides a cascaded compilation method, system, storage medium and computing equipment thereof, which uses a cascaded compilation method of Q-ary LDPC code and RS code to encode and decode the input code stream, and according to the two codes of Q-ary LDPC code and RS code The complementary characteristics of similar coding and decoding, when applied to the sending end, the data blocks after RS ​​encoding are interleaved, and when applied to the receiving end, the data blocks before RS decoding are de-interleaved. By using Q-aryLDPC code and The design of RS code concatenated coding and decoding improves the low bit error rate characteristics of signaling transmission, ensures the reliability of single signaling transmission in URLLC application scenarios as much as possible, and reduces signaling while ensuring reliability. The transmission delay is short, which meets the needs of users for instant communication.

Description

technical field [0001] The present application relates to the technical field of communication, and in particular relates to a cascade compiling method, device, storage medium and computer equipment thereof. Background technique [0002] With the rapid development of wireless communication networks, users' demand for wireless data services increases rapidly. In order to support services with high real-time requirements, such as automatic driving, remote control, industrial automation, electric energy, telemedicine, robotics and other application scenarios, Ultra-reliable and low latency coGGunication (URLLC) is the next generation One of the research topics of mobile communication has attracted widespread attention. The reason is that end-to-end communication needs to meet performance requirements such as extremely short delay and low bit error rate. The block error rate index is required to be less than 1e -3 . [0003] In order to ensure that service data can be receive...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00
CPCH04L1/0057H04L1/0058H04L1/0071
Inventor 廖仁波刘为
Owner CHINA ELECTRONICS TECH GRP NO 7 RES INST