Semiconductor methods and devices

Abstract

In some embodiments, a method of a semiconductor process includes conformally forming a spacer layer over a plurality of mandrels that are disposed over a mask layer, portions of the spacer layer disposed over opposing sidewalls of adjacent ones of the plurality of mandrels defining trenches therebetween, filling the trenches with a dummy material, and removing first portions of the dummy materialin the trenches, thereby forming a plurality of openings in the dummy material. The method further includes filling the plurality of openings with a first material, removing a remaining portion of the dummy material in the trenches, and removing the plurality of mandrels after the removing the dummy material. The embodiment of the invention relates to semiconductor methods and devices.

Description

technical field [0001] Embodiments of the invention relate to semiconductor methods and devices. Background technique [0002] The semiconductor industry has experienced rapid growth due to the increasing integration density of many electronic components (eg, transistors, diodes, resistors, capacitors, etc.). In most cases, the increase in integration density is caused by repeated reductions in minimum feature size, which allow more components to be integrated into a given area. [0003] As features continue to shrink in advanced semiconductor manufacturing processes, conventional photolithography may not provide sufficient resolution for desired pitch dimensions. The mask layer with a small pitch size can be patterned using multiple patterning techniques such as self-aligned double patterning (SADP) and self-aligned quad patterning (SAQP). For example, when a patterned masking layer is used to form conductive features in subsequent processing, it may be necessary to cut t...

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Problems solved by technology

Challenges exist in the formation of dicing masks

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