A 10:4 Carry Store Adder and 10:2 Carry Store Adder

Abstract

A 10:4 carry storage adder and a 10:2 carry storage adder belong to the field of data processing technical equipment. The 10:4 carry-store adder includes ten data inputs, two sum outputs, two carry-store outputs, four high-order mid-carry outputs, and four low-order mid-carry inputs. Between the data input and the sum value and the carry storage output, the time delay of the critical path is a logic circuit with a four-level XOR gate delay. Combine ten data inputs with four low-order intermediate carry inputs to generate two sum values ​​and two carry storage outputs. , the logic circuit includes four 3:2 carry store adders and one 4:2 carry store adder. The 10:2 carry store adder includes a 10:4 carry store adder and a 4:2 carry store adder, and the critical path time delay is a seven-level XOR gate delay. The invention is only realized by the exclusive OR gate / selector, and has the beneficial effects of regular structure, high speed and low power consumption.

Description

technical field [0001] A 10:4 carry storage adder and a 10:2 carry storage adder belong to the field of data processing technical equipment. Background technique [0002] Fast arithmetic operation circuits are the main components of high-performance computers and data processing systems. In arithmetic operation circuits, binary adders are the most basic operation units. The two most common types of binary adders are carry propagation adders (CPA) and carry storage. Adder (CSA). [0003] The Carry Propagation Adder (CPA) is usually used to add two input numbers and output an output number. The value is from big to small, add the two numbers in the same bit, and send the carry to the adjacent high bit. The multi-bit sum value is obtained by adding the bits sequentially, and the highest bit is a single carry. This skip-carry operation is a very slow non-parallel operation, because the high-order calculation depends on the low-order operation result. [0004] A carry-store a...

AI Technical Summary

Problems solved by technology

Generally, such as Figure 1~3 As shown, the critical path time delay of the 3:2 carry storage adder is a two-stage XOR gate delay; as Figure 4~5 As shown, the critical path time delay of the 4:2 carry storage adder is a three-level XOR gate delay; Image 6 The critical path time delay of the first 5:2 carry storage adder composed of XOR gates, selectors, AND gates and OR gates given in In addition to the selector, it also involves other compound AND or operation circuits, so this kind of 5:2 carry storage adder is difficult to realize only with the exclusive OR gate and the selector, and the structure is not regular, which is not conducive to the layout of the integrated circuit

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