Path calculation method for optical on-chip network under optical circuit switching condition
An optical-on-chip network and path calculation technology, which is applied in the field of communication, can solve problems such as inability to perceive network traffic, congestion, and delay conditions, delay, and throughput performance degradation, network communication conflicts, and congestion, etc., to improve delay performance and Improvement of communication efficiency, data transmission efficiency, improvement of communication efficiency and throughput
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Embodiment 1
[0028] The most commonly used path selection method in the optical network on chip under the condition of the existing optical circuit switching mechanism is the dimension order path selection method. In the two-dimensional case, it includes the XY path selection method and the YX path selection method. Although the logic is simple, the existing optical Most of the path selection methods in the optical network on chip under the condition of circuit switching mechanism are based on this method. However, with the increasing data communication requirements of the optical network on chip, the dimension order path selection method of the existing optical circuit switching mechanism It has been unable to meet its network communication requirements, and provide performance such as high throughput and low delay for the network. For this reason, the present invention has launched research and innovation, and proposes an optical on-chip network path calculation method under the condition ...
Embodiment 2
[0055] The calculation method of the optical on-chip network path under the optical circuit switching condition is the same as that described in embodiment 1, step 4b) to calculate the candidate port congestion delay prediction value PC of the Pth candidate output port under the optical circuit switching condition P , the calculation formula is:
[0056]
[0057] Among them, P represents the serial number of the candidate output port, DL represents the historical value of the processing delay of the candidate output port, Indicates the number of link-building packets to be sent at the buffer of the Pth candidate output port when the link-building packet currently being served is received by the node, Indicates that the link-building packet currently being served is received by the node, and the j-th link-building packet to be sent at the buffer of the Pth candidate output port has no congestion transmission delay, and j indicates that the link-building packet currently bei...
Embodiment 3
[0061] The optical on-chip network path calculation method under the optical circuit switching condition is the same as that described in embodiment 1-2, step 4c) to calculate the candidate output port processing time delay prediction value TP of the Pth candidate output port under the optical circuit switching condition P ,Calculated as follows:
[0062]
[0063] in, Indicates the number of link-building packets to be sent at the output port cache of the Pth candidate output port in the current state, Indicates the non-congestion transmission delay of the i-th link-building packet to be sent at the output port buffer of the P-th candidate output port in the current state, PC P Indicates the predicted value of the candidate port congestion delay of the Pth candidate output port, i represents the sequence number of the link establishment packet to be sent at the output port cache of the Pth candidate output port in the current state,
[0064] In the present invention, ...
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