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Method of making source electrode and semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problem of high cost and achieve the effect of reducing costs

Active Publication Date: 2018-08-07
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is that the source of the existing floating gate flash memory requires a special photomask process, which results in high cost.

Method used

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  • Method of making source electrode and semiconductor device
  • Method of making source electrode and semiconductor device
  • Method of making source electrode and semiconductor device

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Embodiment Construction

[0027] The method for fabricating the source electrode and the semiconductor device of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention. For the sake of clarity, the drawings will not label all like components in every figure.

[0028] The terms "first", "second", etc. in the description and claims are used to distinguish between similar elements and not necessarily to describe a specific order or chronological order. It is to be understood that these terms so used are interchangeable under appropriate circumstances. Similarly, if a method described herein includes a series...

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Abstract

The invention relates to a method of making a source electrode and a semiconductor device. The method comprises: a plurality of gate structures are formed above a semiconductor substrate, wherein theplurality of gate structures include a first gap and a second gap and the width of the first gap is smaller than that of the second gap in a same direction; a dielectric layer and an etching barrier layer are formed on the gate structure successively; the dielectric layer is etched until the dielectric layer in the first gap is removed and the second gap is still covered by the dielectric layer; the semiconductor substrate of the first gap is etched to form a second groove and the rest of etching barrier layer and dielectric layer are removed; and then ion implantation is performed to form a source electrode in the second groove area. With the method provided by the invention, the photomask process is saved, so that the cost is lowered. In addition, the invention also provides a semiconductor device including the source electrode formed by the method.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a source electrode manufacturing method and a semiconductor device. Background technique [0002] With the rapid development of the semiconductor industry, in order to achieve the purpose of improving production efficiency and reducing production costs, the integration density of integrated circuit chips, that is, the number of semiconductor devices interconnected on a chip per unit area, has increased, while the geometric size of semiconductor devices has shrunk. However, this trend also increases the complexity of the manufacturing process of semiconductor devices. For example, in the manufacturing process of semiconductor devices including metal oxide semiconductor field effect transistors (MOSFETs), it usually needs to go through multiple photomask processes (usually including exposure, development, etching, etc.) A series of processes such as etching to pattern a cert...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11521H01L21/28H10B41/30
CPCH01L29/40114H01L21/28H10B41/30
Inventor 罗清威李赟周俊
Owner WUHAN XINXIN SEMICON MFG CO LTD