Chip lead pin circuit, chip and chip testing method

Abstract

The application relates to a chip lead pin circuit, a chip and a chip testing method. The chip lead pin circuit includes a power source base pin, a chip signal lead pin, and a ground signal lead pin.The chip lead pin circuit also comprises a first breakable assembly connected in the circuit of the chip signal lead pin to the power source base pin, orand a second breakable assembly connected in acircuit of the chip signal lead pin to the ground signal lead pin; the first breakable assembly orand the second breakable assembly are used in an unrecoverable circuit break state after control signals take effect. Via adoption of the chip lead pin circuit, chips that cannot pass test verification can be marked and retested conveniently, and retesting cost can be lowered.

Description

technical field [0001] The application relates to the field of chip technology, in particular to a chip pin circuit, a chip and a chip testing method. Background technique [0002] With the development of automatic control technology, various control chips occupy a huge share in the market. In order to ensure that the accuracy and performance of the chip are up to standard and reliable, detailed and careful testing is required before the chip is introduced into the market. The testing of chips mainly includes testing of unpackaged chips (ie, wafer-level chips) and testing of packaged chips (ie, package-level chips). [0003] For unpackaged chips, select a suitable ATE (automatic test equipment, automatic test device) machine, and then formulate a complete test plan according to the test requirements of the chip. Then, on this basis, design a peripheral circuit to connect the instrument of the ATE machine and the chip itself. At the same time, it is necessary to develop th...

AI Technical Summary

Problems solved by technology

[0004] In the process of batch testing of chips, including testing of unpackaged chips and testing of packaged chips, there will be a certain number of chips that fail to pass the test verification, and the test failure items of each chip in this type of chips may also be At the same time, the test reports generated during the entire test process are complicated. Since there is no obvious mark to distinguish good chips from bad chips, when reviewing chips, it is often necessary to retest each function or performance item of the chip. The cost of testing is high, and a little carelessness may mix a chip that has not passed the test and verification (referred to as a bad chip) into a chip that has passed the test and verification (referred to as a good chip), causing greater losses, such as increased maintenance costs

Images