IEEE802.11n LDPC (Low Density Parity Check) encoding system and method as well as LDPC encoder

Abstract

The invention belongs to the technical field of redundant term error detection or forward error correction for data expression, and discloses an IEEE802.11n LDPC (Low Density Parity Check) encoding system and method. The system comprises a Z-bit register module, a parameter control module, a barrel-shaped displacement module, a check bit p0 calculation module, an encoded middle information lambdacalculation module, a check bit pi calculation module, a check bit pi' calculation module, an information bit mj and check bit pi cache module, a check bit pi' cache module and a code output module. By adding of a dual-input xor summator and a register, parallel encoding of two paths of an encoder can be achieved, and the encoding time delay of an LDPC encoder is substantially shortened, so that increase of the throughput rate is realized. According to the IEEE802.11n LDPC encoding system, by use of the parallel calculation idea, a little hardware resource consumption is increased, but the throughput rate of the encoder is substantially increased. The used encoding algorithm is low in complexity, high in throughput and suitable for hardware implementation.

Description

technical field [0001] The invention belongs to the technical field of redundant item error detection or forward error correction in data representation, and in particular relates to an LDPC encoding system and method compatible with the IEEE 802.11n standard, and an LDPC encoder. Background technique [0002] At present, the existing technologies commonly used in the industry are as follows: The full name of the LDPC code is Low Density ParityCheck. Since it was proposed in 1960, it has been proved to be a good code with error correction performance close to the Shannon limit. Due to the excellent performance of LDPC codes, low encoding and decoding complexity, and suitable for hardware implementation, more and more communication systems choose LDPC codes as channel coding schemes. In recent years, the widely used IEEE 802.11n standard uses LDPC codes. The prior art "Efficient encoding of IEEE 802.11n LDPC codes" proposes an efficient encoding algorithm compatible with the...

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Problems solved by technology

The disadvantage of this encoder is that when implemented in FPGA, the encoder structure needs to perform 12 81-bit vector-to-vector additions in the same clock, which not only consumes a lot of hardware such as adders and circular shift registers resources, it also results in greatly reduced encoder robustness and maximum supported clock rate

[0004] (1) The encoder structure proposed in prior art 1 has a high throughput rate but high resource consumption, which is not suitable for practical applications

[0005] (2) The throughput rate of the encoder structure proposed in prior art 2 is low

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