Semiconductor structure and formation method thereof

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method of the semiconductor structure comprises the steps of providing a substrate, wherein the substrate comprises a first stack structure and a first channel hole structure, the first channel hole structure penetrates through the first stack structure, a semiconductor layer and a groove are further formed in the top of the first channel hole structure, and the groove is arranged in the semiconductor layer; forming an oxide layer on a surface of the semiconductor layer; forming an etching stop layer, arranged on a surface of the oxide layer, in the groove; forming a second stack structure on a surface of the first stack structure and a surface of the etching stop layer; etching the second stack structure to form a second channel hole penetrating through the second stack structure; removing the etching stop layer, and exposing the oxide layer; forming a second functional side wall on a surface of a side wall of the second channel hole, etching a part of the oxide layer, and exposing the semiconductor layer at the bottom of the second channel hole; and forming a second channel layer on surfaces of the second functional side wall and the exposed semiconductor layer. By the method, the quality of the semiconductor layer can be improved, so that the performance of the semiconductor structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In recent years, the development of flash memory (Flash Memory) is particularly rapid. The main feature of flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc. Has been widely used. In order to further increase the bit density (Bit Density) of the flash memory while reducing the bit cost (Bit Cost), three-dimensional flash memory (3D NAND) technology has been developed rapidly. [0003] In order to further increase the bit density of the 3D NAND flash memory structure, a double-layer or multi-layer channel hole structure is applied, and a semiconductor layer between the upper and lower channel hole structures, such as a polysilicon layer, is used between the m...

AI Technical Summary

Problems solved by technology

[0003] In order to further increase the bit density of the 3D NAND flash memory structure, a double-layer or multi-layer channel hole structure is applied, and a semiconductor layer between the upper and lower channel hole structures, such as a polysilicon layer, is used between the multi-layer channel hole structures. , to carry out current transmission, and the surface of the semiconductor layer is prone to defects when etching the upper channel hole, which will affect the current transmission effect on the surface of the semiconductor layer, thereby affecting the yield of the product and resulting in a decrease in the reliability of the product

Images