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1S1R memory integrated structure and preparation method thereof

A 1S1R, memory technology, applied in the direction of semiconductor devices, electric solid state devices, electrical components, etc., can solve the problem that the gating tube is difficult to meet the requirements of high on-state current density, so as to reduce the requirements, increase the device area, and suppress the leakage current Effect

Active Publication Date: 2018-10-09
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Most of the gate transistors are difficult to meet the requirements of high on-state current density, which has become the main problem that limits the large-scale integration of both ends of the memory.

Method used

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  • 1S1R memory integrated structure and preparation method thereof
  • 1S1R memory integrated structure and preparation method thereof
  • 1S1R memory integrated structure and preparation method thereof

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Embodiment Construction

[0045] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0046]The present disclosure provides a 1S1R memory integrated structure, including: word line metal, resistive material layer, gate bottom electrode, gate material layer, gate top electrode, interconnection wire and bit line metal; The material layer of the gate tube is in the shape of a groove, and the upper electrode of the gate tube is formed in the groove.

[0047] In addition, the present disclosure also provides a method for preparing a 1S1R memory integrated structure, including:

[0048] Forming the word line metal, the resistive material layer and the lower electrode of the gate tube sequentially from bottom to top;

[0049] forming an insulating layer on the lower electrode of the gate tube, and etching th...

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Abstract

The invention provides a 1S1R memory integrated structure and a preparation method thereof. The 1S1R memory integrated structure comprises a word line metal, a resistive change material layer, a gatetube lower electrode, a gate tube material layer, a gate tube upper electrode, an interconnecting wire and a bit line metal, wherein the gate tube material layer is in the shape of a groove, and the gate tube upper electrode is formed in the groove. According to the 1S1R memory integrated structure and the preparation method thereof disclosed by the invention, the device area of a gate tube is much bigger than that of a memory through the change of the integrated position of the gate tube, so that the requirement on the ON state current density of the gate tube is reduced obviously.

Description

technical field [0001] The disclosure belongs to the technical field of microelectronics manufacturing and memory, and in particular relates to a 1S1R memory integrated structure and a preparation method thereof. Background technique [0002] Memory occupies an important position in the semiconductor market and can generally be divided into volatile memory and non-volatile memory. Volatile memory means that the information in the memory must be kept when power is turned on, and the stored information will be lost when it is not powered on; the main feature of non-volatile memory is that it can be stored for a long time without power on. Information. With the increasing popularity of portable electronic devices, non-volatile memory is becoming more and more important in embedded applications. Due to the explosive expansion of emerging markets such as the Internet of Things, artificial intelligence, smart cars, and virtual reality, high-density embedded memories are required...

Claims

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Application Information

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IPC IPC(8): H01L45/00H01L27/02
CPCH01L27/0207H10N70/801H10N70/20H10N70/011
Inventor 罗庆吕杭炳刘明许晓欣路程
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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