A neural network method and circuit for optimizing sparse matrix operations

Abstract

The present invention provides a neural network method and circuit for optimizing sparsity matrix operations. The method uses a non-zero data regularization unit to count the number of non-zero data of the first characteristic matrix data obtained from the main memory unit, and according to The corresponding relationship between the number of non-zero data and the number of multipliers required for the convolution operation is to use a gating clock control circuit to control the corresponding clock group to turn on, and then perform the multiplication and addition operation to obtain the convolution feature data. In the subsequent accumulation operation process, the accumulation unit only accumulates the non-zero data in the convolution feature data, and transmits the accumulation operation data to the activation function operation unit for activation operation after the accumulation is completed. Compared with the method of accumulating and calculating the entire convolution feature data, the present invention can effectively reduce the calculation amount and power consumption during the operation process of the neural network circuit.

Description

technical field [0001] The invention relates to the field of neural network chip circuits, in particular to a neural network method and circuit for optimizing sparse matrix operations. Background technique [0002] With the rise of the artificial intelligence industry, special chips for deep learning are also developing rapidly. One of the biggest problems of the current deep learning chip is that due to the complexity of the deep learning neural network, the calculation circuit is huge, the chip cost is high, and the power consumption is high. If we can start from the characteristics of deep learning, it will be very meaningful to further reduce the cost and power consumption of deep learning artificial intelligence chips. [0003] Since one of the characteristics of human brain processing information is sparsity, many studies have shown that only about 1% of brain neurons are activated at the same time. From the perspective of signals, that is, neurons only selectively r...

AI Technical Summary

Problems solved by technology

[0004] To this end, it is necessary to provide a technical solution for optimizing the neural network of sparse matrix operations to solve the problems of large computing circuits, large consumption of hardware resources, and high power consumption during the processing of neural network chips.

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