Starting judgment method and device for processor

Abstract

The embodiment of the invention provides a starting judgment method and device for a processor, and is applied to a base station. The processor is positioned in the board card of the base station, andthe board card comprises a CPLD (Complex Programmable Logic Device). The method comprises the following steps that: after a board card reset starting operation is carried out, the CPLD judges whetherthe processor is successfully started or not; and if the processor fails to be started, triggering the processor to execute the reset starting operation again. In the embodiment of the invention, thestarting judgment method for the base station processor is set in the CPLD contained in the base station, and after the base station board card reset starting operation is triggered, whether the basestation processor is successfully started or not is judged; and if the processor fails to be started, the processor is triggered again to execute the reset starting operation until the base station processor is successfully started so as to greatly improve the starting success rate of the base station processor, the reliability and the success rate of base station starting are greatly improved, and the monitoring vulnerability of a watchdog is made up.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a method and device for judging the startup of a processor. Background technique [0002] With the rapid development of communication technology, the base station is also constantly updated, and the boards, processors, and memory in the base station are gradually upgraded. The processing power of the processor in the base station is getting stronger and stronger, the storage space of the peripheral device is getting bigger and bigger, and the required data interaction rate is getting faster and faster, which means that the reading and writing data of the memory is getting faster and faster. [0003] Although the memory timing window is wide, it takes a long time to find a stable parameter. Even if you find a set of timing parameters that have no data errors after a long period of high and low temperature stress testing, the base station cannot be guaranteed. During the li...

AI Technical Summary

Problems solved by technology

[0003] Although the memory timing window is wide, it takes a long time to find a stable parameter. Even if you find a set of timing parameters that have no data errors after a long period of high and low temperature stress testing, the base station cannot be guaranteed. If the base station processor does not start abnormally due to data errors within the life cycle of the board, then the base station fails to start, and the cell establishment fails, which requires manual restart of the board or reset of the processor to solve the problem

[0004] Although there is an ECC (Error Correcting Code) module in the base station, ECC can only detect and correct some errors. When a large area of ​​read and write verification errors occurs, the base station processor will start abnormally, and a large number of ECC calibrations will be reported. Error, at this time the ECC module of the memory controller cannot automatically restore the error data

[0005] In addition, although there is a watchdog in the base station system to monitor the status of the base station processor, it is only after the base station processor is started, and software is required to enable the watchdog function, which does not guarantee a safe and reliable start of the base station processor.

Images