Bidirectional silicon-controlled electrostatic protection device with high protection level and fabrication method thereof

Abstract

The invention discloses a bidirectional silicon-controlled electrostatic protection device with high protection level. The bidirectional silicon-controlled electrostatic protection device comprises aP-type substrate, wherein an N-type buried layer is arranged in the substrate, an N-type deep well is arranged on the N-type buried layer, a first P well and a second P well are arranged in the N-typedeep well, a first P+ injection region and a plurality of N+ injection regions I are arranged in the first P well, a second P+ injection region and a plurality of N+ injection regions II are arrangedin the second P well, the first P+ injection region and all N+ injection regions I are connected and used as a positive electrode of the device, and the second P+ injection region and all N+ injection regions II are connected and used as a negative electrode of the device. The numbers of the N+ injection regions I and the N+ injection regions II can be increased or reduced according to differentprotection levels, the numbers of the N+ injection regions I and the N+ injection regions II are increased if the protection level is high, the uniform current distribution of the device is improved,and the robustness of the device is improved; and if the protection level is low, the numbers of the N+ injection regions I and the N+ injection regions II are reduced, and the layout area is reduced.

Description

technical field [0001] The invention relates to the field of electrostatic protection, in particular to a bidirectional thyristor electrostatic protection device with high protection level and a manufacturing method thereof. Background technique [0002] With the advancement of semiconductor manufacturing technology, the failure of integrated circuit chips and electronic products caused by ESD has become more and more serious. ESD protection for electronic products and integrated circuit chips has become one of the main problems faced by product engineers. [0003] The failure modes caused by ESD include hard failure, soft failure and latent failure. The causes of these failures can be divided into electrical failures and thermal failures. The thermal failure refers to that when the ESD pulse comes, a current of a few amperes to tens of amperes is generated locally on the chip. The duration is short but a large amount of heat will be generated to melt the local metal conne...

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Problems solved by technology

However, SCR has a high trigger voltage and low sustain voltage, which is easy to exceed the design window and cause latch-up, so it is necessary to increase its sustain voltage

However, the method of increasing the maintenance voltage will reduce the robustness of the device, so it is also necessary to consider its robustness

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