A resistance-capacitance hybrid digital-to-analog converter

A digital-to-analog converter, hybrid technology, applied in the direction of digital-to-analog converter, analog/digital conversion, code conversion, etc., can solve the capacitor array matching accuracy capacitor array matching error non-linear error, capacitance value increase, large chip area and other issues to achieve the effect of achieving linearity and reducing the impact

A digital-to-analog converter, hybrid technology, applied in the direction of digital-to-analog converter, analog/digital conversion, code conversion, etc., can solve the capacitor array matching accuracy capacitor array matching error non-linear error, capacitance value increase, large chip area and other issues to achieve the effect of achieving linearity and reducing the impact

CN109004934BActive Publication Date: 2021-09-24UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • A resistance-capacitance hybrid digital-to-analog converter
  • A resistance-capacitance hybrid digital-to-analog converter
  • A resistance-capacitance hybrid digital-to-analog converter

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Embodiment Construction

[0021] The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0022] Such as figure 2 Shown is a schematic structural diagram of a resistance-capacitance hybrid digital-to-analog converter proposed by the present invention. The present invention is a resistance-capacitance hybrid digital-to-analog conversion DAC array structure with a total input bit number of n+m, including the corresponding input first An n-bit resistor array unit to the nth bit, an m-bit capacitor array unit corresponding to the input n+1 to n+m bits, and a redundant capacitor. Among them, the resistance array unit adopts the R2R resistance array structure, and every two resistances are R u The unit resistors are connected in series to form a resistance value of 2R u The series structure, a total of n series structures, requires 2n unit resistors, of which the value of n resistors is 2R u One end of the series structure is respe...

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Abstract

A resistance-capacitance hybrid digital-to-analog converter belongs to the technical field of analog integrated circuits. Including resistor array unit, capacitor array unit and redundant capacitor; the resistor array unit uses R2R resistor array for the 1st to nth bits corresponding to the input, and the capacitor array unit uses a binary weight capacitor array corresponding to the n+1th to the input n+m bits, in which the capacitance value corresponding to the highest bit, that is, the n+m bit, is 2 m‑1 C u The capacitor is split into 2 capacitors with a value of 2 m‑2 C u The capacitance of the capacitor, the capacitance value corresponding to the second high bit of the input is 2 m‑2 C u The capacitors constitute a 3-bit temperature code, which reduces the influence of capacitance mismatch on the linearity of the digital-to-analog converter. The present invention can realize the compromise of linearity, area and power consumption by controlling the combination ratio of the resistance array unit and the capacitance array unit, so that the present invention can be applied to SAR ADCs with different indexes.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a resistance-capacitance hybrid digital-to-analog converter (DAC) array, which can be applied to a successive approximation analog-to-digital converter (SAR ADC). Background technique [0002] In analog integrated circuit technology, the successive approximation analog-to-digital converter (SAR ADC) has always been a research hotspot in the field of analog-to-digital converters (ADC) at home and abroad, because of its low power consumption, small area, and medium to high resolution. , so that SAR ADC has been widely used, for example, in the fields of industrial control, automotive electronics and consumer electronics. [0003] The DAC digital-to-analog conversion module of the successive approximation analog-to-digital converter is one of the key modules, and its linearity directly affects the linearity of the SAR ADC. There are currently four cla...

Claims

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Application Information

Patent Timeline
24 Sep 2021
Publication
CN109004934B
IPC
H03M1/10; H03M1/66
CPC
H03M1/1014; H03M1/66
Inventors
唐鹤; 车来晟