A low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation

A low-complexity, optimization-method technology, applied in complex mathematical operations, instruments, calculations, etc., to reduce hardware resource consumption, improve computing speed, and suppress the growth of data bits

Active Publication Date: 2019-02-19
HARBIN ENG UNIV
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  • Application Information

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Problems solved by technology

[0004] In summary, the prior art does not use the shift-add module

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  • A low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation
  • A low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation
  • A low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation

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Embodiment Construction

[0028] The present invention will be further described below in conjunction with the accompanying drawings.

[0029] The invention belongs to the application field of software radio and digital signal processing thereof, and in particular relates to an FFT optimization design method without a multiplier and low resource consumption.

[0030] With the rapid development of software radio systems, communication systems, video signal analysis, voice signal analysis, image signal processing, radar signal processing and other fields, the design of fast Fourier transform (FFT) algorithm has attracted the attention of all parties. . With the continuous development and improvement of the algorithm, the fast Fourier transform is favored in the processing of wideband receivers and image and video processing. Fast Fourier transform is not only an important factor in determining processor performance, but also has an excellent application status in military industry, and occupies an impor...

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Abstract

The invention belongs to the application field of software radio and digital signal processing thereof, in particular to a low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation. The method includes obtaining FFT input data bits N and input data; shifting the decimal fraction of each rotation factor by N bits to the left, and dividing the data into a real part and an imaginary part, wherein N is the number of bits of the input data; rounding up the real part and the imaginary part up and down respectively, so that they are approximated to integers; All integers are factorized to the second power, and the integer with the least number of additions is selected; The circuit is designed by using shift and addition, and the multiplication of the originalrotation factor is replaced by the shift and addition of the data itself. The present invention further reduces the number of adders while replacing conventional complex multipliers with shift and add-subtract. At the same time, the dynamic bit-truncation module is added to restrain the growth of data bits, reduce the consumption of hardware resources, improve the computing speed and improve the performance of the circuit.

Description

technical field [0001] The invention belongs to the application field of software radio and digital signal processing thereof, in particular to a low-complexity multiplier-free fixed-point FFT optimization method based on dynamic truncation. Background technique [0002] With the rapid development of software radio systems, communication systems, video signal analysis, voice signal analysis, image signal processing, radar signal processing and other fields, the design of fast Fourier transform algorithms has attracted the attention of all parties. With the continuous development and improvement of the algorithm, the fast Fourier transform is favored in the processing of wideband receivers and image and video processing. Fast Fourier transform is not only an important factor in determining processor performance, but also has an excellent application status in military industry, and occupies an important position in satellite signal processing, audio image filtering, and radar...

Claims

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Application Information

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IPC IPC(8): G06F17/14
CPCG06F17/142
Inventor 张文旭何俊希张春光杜秋影李广琦张恒范晓蕾姚雨双
Owner HARBIN ENG UNIV
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