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A Fast Calculation Method of Adder Based on Undercurrent Path of Memristor Array

A fast computing and memristor technology, applied in computing, instrumentation, electrical digital data processing, etc., can solve the problem of consuming memristor array hardware resources, and achieve the effect of increasing power consumption and area overhead

Active Publication Date: 2022-07-01
SHANGHAI JIAO TONG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The disadvantage of this implementation is the same as that based on the lookup table, that is, it is not a real memory calculation, and it consumes a lot of hardware resources of the memristor array.

Method used

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  • A Fast Calculation Method of Adder Based on Undercurrent Path of Memristor Array
  • A Fast Calculation Method of Adder Based on Undercurrent Path of Memristor Array
  • A Fast Calculation Method of Adder Based on Undercurrent Path of Memristor Array

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Experimental program
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Embodiment

[0047] The logical expression of the 1-bit full adder can be expressed as the following two equations:

[0048]

[0049] C 0 =AB+AC i +BC i

[0050] For a multi-bit adder, if the calculation is performed step by step in a logical iterative manner, the operation efficiency will be low, thereby losing the advantages brought by the memory computing technology due to the reduction of data moving overhead. However, if the carry of all bits can be obtained in an efficient manner, the sum of all bits can be obtained at one time by taking advantage of the parallel nature of the array structure.

[0051] According to the above thought, Figure 1a and 1b The schematic diagram of the carry calculation based on the memristor is given. Note that the memristor represents the logic value through the resistance value, the low resistance state (LRS) represents the logic 1, and the high resistance state (HRS) represents the logic 0. in Figure 1a The three undercurrent paths generated b...

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Abstract

The invention discloses a fast calculation method for an adder based on a memristor array undercurrent path, comprising the following steps: 1) mapping the carry undercurrent path, and calculating R in advance G , R D and R P 2) Constructing a serial carry chain, since the array structure cannot form a carry propagation path, it is necessary to customize a path by R P Controlled carry propagation path to cope with R in step 1) P 3) Summation calculation After the carry calculation of each bit is completed, the summation calculation of all bits is completed in parallel through the corresponding logic implementation. The present invention is based on the design of the adder of the memristor storage array, uses HSPICE and a new non-volatile memory simulation tool NVSim to test the design, and has significant improvements in computing performance, area overhead and power consumption overhead.

Description

technical field [0001] The invention relates to the technical field of memory computing, in particular, to a fast computing method for an adder based on a memristor array undercurrent path. Background technique [0002] At this stage, there are three main methods for addition calculation based on memristor memory arrays. [0003] They are Boolean logic-based, look-up table-based (LUT) and programmable logic array-based (PLA). [0004] The method based on Boolean logic is the most simple and intuitive, that is, according to the logical expression of addition, it is formed by splicing the basic logic organization supported by the circuit. Typical implementations include IMPLY circuit, MAGIC circuit and so on. However, the disadvantage of this operation method is also obvious, that is, the calculation efficiency is low. For a 1-bit full adder, using the IMPLY circuit and the MAGIC circuit requires 29 and 12 steps of operation respectively. Contemporary computing systems are u...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/505
CPCG06F7/5052
Inventor 景乃锋李桃中李彤王琴蒋剑飞贺光辉毛志刚
Owner SHANGHAI JIAO TONG UNIV
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