Three-dimensional computing chip comprising three-dimensional memory array

Abstract

The invention proposes a three-dimensional computing (3D-COM) chip comprising a three-dimensional memory (3D-M) array. Unlike the traditional storage of computational data, the 3D-M array in the 3D-COM is mainly used for storing memory parameters. One 3D-COM chip comprises thousands of memory and computing units. Each memory and computing unit implements three-dimensional integration between the 3D-M array and a computational core at a microscale, and realizes ultra-large-scale parallel computing.

Description

technical field [0001] The invention relates to the field of integrated circuits, more specifically, to a processor chip containing a three-dimensional memory array, that is, a three-dimensional computing chip. Background technique [0002] US Patent 5,835,396 (inventor: Zhang Guobiao; date of authorization: November 10, 1998) and Chinese patent 98119572.5 (inventor: Zhang Guobiao; date of authorization: January 22, 2003) disclose a three-dimensional memory ( three-dimensional memory, referred to as 3D-M). Figure 1A It is a layout diagram of a 3D-M chip; Figure 1B is a perspective view of a 3D-M array in 3D-M. Each 3D-M chip 300 is formed on a semiconductor substrate 0, which contains a plurality of 3D-M arrays 300aa-300mn. The 3D-M array is the smallest repeating unit of the 3D-M chip ( Figure 1A ). The input 310 of the 3D-M chip 300 is address and / or input data, and the output 320 is output data. Each 3D-M array 300ij contains a plurality of vertically stacked memor...

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Problems solved by technology

However, the speed of these external memories is relatively slow, which is not suitable for reading massive calculation parameters, which is very unfavorable f

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