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A screening method and on-chip measurement system for integrated circuit aging reliability

An on-chip measurement and integrated circuit technology, which is applied in the direction of electronic circuit testing, measuring electronics, and measuring devices, can solve the problems of inability to achieve high-precision and fast prediction of the aging speed of integrated circuits, poor correlation between aging speed and critical path aging speed, and aging speed Low correlation and other issues, to achieve the effects of rapid aging reliability screening, occupying a small additional area, and easy integration

Active Publication Date: 2020-08-25
BEIHANG UNIV
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] After searching the existing technical literature, it was found that in 2007, K.Kang et al. published "Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQMeasurement ( Circuit NBTI Reliability Analysis and Evaluation Method Based on IDDQ Test)", a method for NBTI aging prediction by measuring the leakage current of integrated circuits in the standby state is proposed, but the aging speed predicted by this method is correlated with the aging speed of the critical path Poor and requires external equipment for current measurement
J.B.Velamala et al. published "Physicsmatters: Statistical aging prediction under trapping / detrapping (statistical characteristics of integrated circuit aging parameters and aging prediction under TD model)" at DAC Design Automation Conference 2012 (Design Automation Conference) in 2012, and proposed to adopt A method of measuring the threshold voltage to predict the aging of the circuit, but this method requires the use of additional test equipment to test the threshold voltage
Xiaoxiao Wang et al. published "Fast aging degradation rate prediction during production test (fast integrated circuit aging prediction method)" at the Reliability Physics Symposium (Physical Reliability Annual Conference) in 2014, and proposed that the impact of the initial threshold voltage of the ring oscillator on the The aging prediction method of the circuit, but there is an error between the aging prediction of the circuit using the ring oscillator and the actual aging situation
Although the above literature uses the key parameters that characterize the aging of integrated circuits to predict the aging of circuits, the correlation between the predicted results and the aging speed of the actual critical path is low, and some of them require off-chip testing equipment, which cannot realize the aging speed of integrated circuits. high-precision fast prediction

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  • A screening method and on-chip measurement system for integrated circuit aging reliability
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  • A screening method and on-chip measurement system for integrated circuit aging reliability

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Embodiment 1

[0081] Apply a kind of screening method and on-chip measurement system of integrated circuit aging reliability designed by the present invention to carry out emulation and test:

[0082]HSPICE 2014 software is used for testing, the test uses 28nm process library for simulation, and VCS is used for functional simulation of the test system. Use the Monte Carlo simulation method in Hspice to verify the test accuracy of the test circuit under manufacturing uncertainty, adding 10% W, 10% L and 25% V to the test th manufacturing uncertainty. Where, W is the gate width, L is the gate length, V th is the threshold voltage of the MOS tube. The functional simulation waveform diagram of the on-chip measurement system can be found in Image 6 As shown, the on-chip measurement system can realize the delay measurement of the critical path in the normal operation of the circuit. When the power supply voltage of the on-chip measurement system is 1.05V, the average delay difference of a si...

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Abstract

The invention discloses a method and an on-chip measuring system for screening an aging reliability of an integrated circuit. The system is composed of a configurable annular oscillator, an edge detection circuit, and a test and control module. A return path in the configurable annular oscillator is used for calibrating one clock cycle, a match path in the configurable annular oscillator is used for configuring the delay of a buffer path to be the same as the delay of a critical path. The edge detection circuit is used for the calibration process of the match path. The test and control moduleis used for controlling the working mode of the whole measuring system. According to the on-chip measuring system for screening the aging reliability of the integrated circuit, the delay of the critical path under different supply voltages can be accurately measured, the aging speed of the critical path of the integrated circuit can be predicted. According to the method for screening the aging reliability of the integrated circuit, rapid aging reliability screening can be performed on the integrated circuit. In addition, the designed on-chip measuring system can perform delay measuring on thecritical path when the circuit is normally operated, and can monitor the aging degree of the integrated circuit in real time.

Description

technical field [0001] The invention relates to a screening method for aging reliability of integrated circuits and an on-chip measurement system. The measurement system can realize accurate measurement of time delays of critical paths of integrated circuits under different power supply voltages. It belongs to the technical field of microelectronic devices. Background technique [0002] An integrated circuit (integrated circuit) is a tiny electronic device or component. It is a semiconductor manufacturing process such as oxidation, photolithography, diffusion, epitaxy, aluminum evaporation, etc., which integrates semiconductors, resistors, capacitors and other components required to form a circuit with certain functions and the connecting wires between them into a small piece of silicon. On-chip, and then welded electronic devices packaged in a tube; all the components have been structurally integrated, making electronic components a big step towards miniaturization, low po...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28
CPCG01R31/2855
Inventor 王晓晓于丽婷苏东林谢树果
Owner BEIHANG UNIV