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Low-power-consumption processing method based on an FPGA and a DSP architecture

A processing method and low power consumption technology, applied in the direction of electrical digital data processing, digital data processing components, instruments, etc., can solve problems such as unstable work and high consumption, and achieve the effect of improving stability and reducing power consumption

Active Publication Date: 2019-04-12
SICHUAN JIUZHOU ELECTRIC GROUP
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Problems solved by technology

[0005] In view of the above-mentioned analysis, the present invention aims to provide a low-power processing method based on FPGA and DSP architecture, which effectively solves the unstable work and high consumption that may be caused by the high power consumption of FPGA and DSP in the existing method. The problem

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  • Low-power-consumption processing method based on an FPGA and a DSP architecture
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  • Low-power-consumption processing method based on an FPGA and a DSP architecture

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Embodiment Construction

[0025] Preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the application and together with the embodiments of the present invention are used to explain the principle of the present invention and are not intended to limit the scope of the present invention.

[0026] According to a specific embodiment of the present invention, such as figure 1 Shown, disclose a kind of low power processing method based on FPGA and DSP framework, comprise the following steps:

[0027] S101, after the system is powered on and started, the FPGA completes its own configuration and the DSP completes the initialization, and the FPGA and DSP are in a low power consumption mode;

[0028] S102, when the DSP receives external data, interrupt the low power consumption mode, and jump to the normal working mode;

[0029] S103, when the DSP detects an external normal operation ...

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Abstract

The invention relates to a low-power-consumption processing method based on an FPGA and a DSP architecture, and belongs to the technical field of digital signal processing. The method comprises the following steps that after a system is powered on and started, an FPGA completes self-configuration and DSP initialization, and the FPGA and the DSP are in a low-power-consumption working mode; when theDSP receives the external data, interrupting the low-power-consumption mode, and skipping to a normal working mode; when the DSP detects an external normal working instruction, the FPGA is controlledto jump to a normal working mode, and normal time sequence work is completed; and after the normal time sequence work is finished, the FPGA automatically enters a low-power-consumption working mode according to the external control of the DSP. According to the invention, the problems of unstable work and high consumption of the system caused by high power consumption of the FPGA and the DSP are effectively solved or relieved.

Description

technical field [0001] The invention relates to the technical field of digital signal processing, in particular to a low-power processing method based on FPGA and DSP architecture. Background technique [0002] In the current signal processing design, the processing method based on FPGA and DSP architecture is widely used in the fields of communication, computer and electronics. FPGA and DSP architecture processing equipment can meet various application systems with large data volume, complex calculation and high real-time requirements. [0003] With the development of signal processing systems and the continuous improvement of device complexity, the power consumption and heat consumption in the chip also increase. Excessive power consumption mainly brings about two problems: one is the sharp increase in heat dissipation, and the other is the rapid consumption of equipment energy. Failure to dissipate heat in time or exceed the temperature required by the chip may cause th...

Claims

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Application Information

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IPC IPC(8): G06F1/3234
CPCG06F1/3234
Inventor 曾昱翔昌畅
Owner SICHUAN JIUZHOU ELECTRIC GROUP
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