Comparison circuit and delay time elimination method
A technology for comparing circuits and circuits, applied in the field of circuits, can solve the problems of response delay causing errors in comparison results and inherent errors in comparison circuits, and achieve the effect of eliminating inherent delays
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[0026] In the prior art, there is always a certain inherent delay in the comparison circuit, which leads to errors in the comparison results. For example, if figure 1 As shown, in the rising process of the input signal VIN, when the input signal VIN is equal to the reference voltage VREF, VOUT should immediately flip to high level at time A, but due to the inherent delay of the comparator, when VOUT flips at time B When it is at a high level, the voltage of the input signal VIN is not equal to the reference voltage VREF at this time, thus causing an error.
[0027] The comparison circuit provided by the embodiment of the present invention works jointly through the control circuit, the capacitor circuit and the transconductance amplifier circuit to control the comparison circuit in different working stages. The shift can make the comparison circuit output the comparison result earlier in the process of signal comparison, so as to effectively eliminate the inherent delay of the...
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