Channel integrated engineering implementation method and device
An implementation method and engineering technology, which is applied in the direction of impedance network, digital technology network, electrical components, etc., can solve the problems of complex architecture and large consumption of FPGA hardware resources, and achieve the effect of reducing usage and strong engineering realizability
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0026] The embodiments of the present invention are described in detail below. This embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following implementation example.
[0027] In this embodiment, from the perspective of complex bandpass filters, the functional block diagram of data channel synthesis is as follows figure 1 shown. According to this principle, the polyphase structure of channel synthesis can be deduced as:
[0028]
[0029] Where j=0,1,...,M-1, K=2M, M is the extraction rate, and K is the number of channels. Analyzing the above formula, it can be found that
[0030] (1) yes K point IDFT;
[0031] (2) Since K=2M,
[0032] (3) is the polyphase filtering result of the IDFT output and the prototype filter.
[0033] Based on the above analysis, a channel ...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com