The invention relates to an SOC chip field programmable logic array prototype integration method and system. The method comprises the following steps that S1, judging whether an engineering folder isestablished or not; S2, establishing an engineering folder according to the parameterized device selection and the engineering directory; S3, judging whether an old engineering folder exists or not; S4, establishing a new engineering folder; S5, performing backup according to the time of the current engineering folder; S6, judging whether the engineering folder is integrated or arranged for wiring; S7, starting a comprehensive tool, and calling a syn.tcl file; S8, judging whether the integrated engineering folder is subjected to layout wiring or not; S9, starting a layout wiring tool, and calling a pr.tcl file; And S10, outputting various reports. The method can be compatible with a multi-field programmable logic array prototype hardware environment, achieves calling of different tools, ishigh in automation degree, good in usability, good in expansibility and easy to maintain, and greatly improves the efficiency of the field programmable logic array prototype.