Cyclic shift processing device and method

A technology of a processing device and a processing method, applied in the computer field, can solve the problems of integer division by the number of shifts, data cyclic shift processing that cannot be long, difficult cyclic shift processing, etc., and achieves the realization of cyclic shift and fast cyclic shift The effect of processing and improving the efficiency of data processing

Active Publication Date: 2019-05-14
上海思朗科技有限公司
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

However, in most cases, the number of shifts is not divisible by 8 (such as a 23-bit circular right shift), and it is difficult to complete the circular shift process with a single instruction at this time

Method used

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  • Cyclic shift processing device and method
  • Cyclic shift processing device and method
  • Cyclic shift processing device and method

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Embodiment Construction

[0034] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0035] Figure 1a shows a structural block diagram of a cyclic shift processing device according to an embodiment of the present invention, as Figure 1a As shown, the device includes: external cache module 101, shift number reading module 102, shift number extraction module 103, byte rearrangement address calculation module 104, original data extraction module 105, byte rearrangement module 106 and splicing Shift module 107 .

[0...

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Abstract

The invention discloses a cyclic shift processing device and method, a byte rearrangement address calculation module in the device calculates a high 8-bit byte address and a low 8-bit byte address corresponding to data required by each byte in a cyclic shift result in original data according to a first part of an extracted shift number; The byte rearrangement module is used for carrying out byte rearrangement on the extracted original data according to the high 8-bit byte address and the low 8-bit byte address respectively to obtain high 8-bit byte data and low 8-bit byte data required by eachbyte; The splicing shifting module is used for splicing the high 8-bit byte data and the low 8-bit byte data required by each byte in parallel to obtain splicing data corresponding to each byte; Andaccording to the extracted second part of the shift number, performing shift processing on the spliced data corresponding to all bytes to obtain a cyclic shift result. According to the scheme, bit-level cyclic shift is achieved, and long data can be subjected to cyclic shift processing conveniently and quickly.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to a cyclic shift processing device and method. Background technique [0002] Cyclic shift technology is used in LDPC (Low-density Parity-check) coding, CRC (Cyclic Redundancy Check code, Cyclic Redundancy Check) verification, convolution and other application fields. Bit means that the bits of the original range before the shift are not lost when shifting, but they are used as the filling bits at the other end. Most of the assembly instruction sets of existing processors use bytes as the unit of operation, and include circular shift instructions suitable for shorter data, which support direct processing within shorter binary data (such as 1 byte or 2 bytes). Perform a cyclic shift. When the binary data that needs to be rotated is long, for example, the data length is 50 bytes, if the shift number can be divisible by 8 (such as a 24-bit circular right shift), the byte re...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 孙一松李桓郭晨王东琳
Owner 上海思朗科技有限公司
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