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A worst response time-based hybrid key system task schedulability analysis method

A technology of response time and analysis method, applied in the computer field, can solve problems such as passivity, waste of CPU resources, and reduced success rate of low safety-critical task scheduling

Active Publication Date: 2019-06-21
NORTHWESTERN POLYTECHNICAL UNIV
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Problems solved by technology

However, after the safety-critical level is increased, the number of high-safety-critical tasks increases. Through this method, the CPU always selects high-priority high-safety-critical tasks for processing, and is too passive in processing low-safety-critical tasks, which easily leads to waste of CPU resources and reduces low-security tasks. Critical Task Scheduling Success Rate

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  • A worst response time-based hybrid key system task schedulability analysis method
  • A worst response time-based hybrid key system task schedulability analysis method
  • A worst response time-based hybrid key system task schedulability analysis method

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Embodiment Construction

[0041] The present invention is further described below with embodiment.

[0042] After the safety-critical level of the mixed-critical system is raised, due to negative processing of low-safety-critical tasks, the analysis of the worst response time of the task is insufficient and inaccurate, and the CPU idling cycle is long. Research on scheduling methods. A task scheduling analysis method (ERTA) for mixed critical systems based on worst response time is proposed. Firstly, a mixed dual safety-critical (DM) task model is given, and the system behavior is redefined; combined with the change of task cycle and priority when the system safety-critical level transitions, the derivation process of the worst response time of the mixed-critical task and the task set can be given. Scheduling theorem. Finally, comparative analysis of examples shows the effectiveness of the present invention.

[0043] Step 1. Put safety-critical tasks w i expressed as a five-tuple form;

[0044] ...

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Abstract

The invention provides a worst response time-based hybrid key system task schedulability analysis method, which comprises the following steps of: firstly, providing a hybrid double-security key (DM) task model, and redefining system behaviors; and giving a worst response time derivation process of the mixed key task and a task set schedulability theorem in combination with the task period and priority change during system safety key level conversion. And finally, example comparative analysis shows that the method is effective. When the security key level is improved, the worst response time analysis method provided by the invention can provide better service for the LC task on the premise of ensuring the schedulability of the HC task; the analysis process is more simplified, the task average response time is shorter, the CUP resource utilization rate is higher, and higher and more stable system throughput can be kept.

Description

technical field [0001] The invention relates to the field of computers, in particular to a scheduling analysis method for safety-critical tasks. Background technique [0002] With the complexity of embedded system requirements and the development of multi-core technology, the mixed critical system (MCS) based on multi-core platform came into being. In order to ensure the security of the system, it is necessary to complete the unified scheduling of different security-critical tasks among multiple cores. Schedulability analysis plays a vital role in mixed-critical task scheduling. The most popular schedulability analysis method based on response time is proposed in the paper "Response-time analysis of mixed criticality systems with pessimistic frequency specification", published in IEEE International Conference on Embedded and Real-Time Computing Systems and Applications 2014:237 -246. The paper describes a fixed-priority scheduling analysis method for achieving safety-crit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06F9/50
CPCY02D10/00
Inventor 朱怡安张志靖李联赵瑞娇
Owner NORTHWESTERN POLYTECHNICAL UNIV
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