4results about How to "Stable throughput" patented technology

The invention discloses an input and output scheduling method and device, electronic equipment and a storage medium, and relates to the technical field of computers.According to the input and output scheduling method and device, the future load state of a storage system is predicted based on historical input and output request data, and the response sequence and the resource allocation strategy of requests with different priorities are dynamically adjusted accordingly; therefore, a mapping relation between load prediction and storage medium characteristics is established, so that the technical problems that key request delay is uncontrollable and system throughput fluctuates when the load suddenly increases in a mixed read-write load scene can be solved; the technical effects of ensuring the low-delay response of the key request, stabilizing the system throughput and improving the overall performance and stability of the system are achieved.

The utility model discloses a grating barrel structure, which relates to the technical field of grating barrels, and comprises a bottom plate and a grating barrel body, a support structure and a rotary driving mechanism which are matched for use are mounted on the bottom plate and the grating barrel body, a water inlet is arranged at one end of the grating barrel body, and a water filtering mechanism is mounted on the upper end surface of the bottom plate at the water inlet. Arc-shaped material guiding strips are fixed to the inner wall of the grille barrel at equal intervals, the supporting structure comprises fixing rings fixed to the two ends of the outer wall of the grille barrel, groove wheels are arranged on the fixing rings, the upper end face of the bottom plate is located on the two sides of the lower portion of the two fixing rings and fixedly provided with supporting wheels, and the supporting wheels are connected with the groove wheels on the fixing rings in a rolling and clamping mode. According to the utility model, the grid cylinder body, the supporting structure, the rotary driving mechanism and the water filtering mechanism are matched for use, so that sewage can be filtered twice, solid filter residues can be discharged out of the grid cylinder body in time, solid-liquid separation of suspended matters is realized, long-time shutdown cleaning is not needed, the treatment capacity is stable, and the maintenance and operation costs are low.

The invention belongs to the technical field of desulfurization wastewater treatment, and particularly relates to a bypass flue gas evaporation system for zero emission of desulfurization wastewater, which comprises two units, outlet flues of a denitration system A reactor and a denitration system B reactor are both connected with a bypass high-temperature flue gas system, and the bypass high-temperature flue gas system is connected with a high-temperature flue gas three-way valve group device. The high-temperature flue gas three-way valve group device is connected with the top end of the drying tower, the bottom end of the drying tower is connected with the low-temperature flue gas three-way valve group device, the low-temperature flue gas three-way valve group device is connected with the bypass low-temperature flue gas system, outlet flues of reactors A and B of the denitration system are correspondingly connected with air preheaters A and B, and outlet flues of the air preheaters A and B are correspondingly connected with dust removers A and B; two branch pipes of the bypass low-temperature flue gas system are correspondingly connected with outlet flues of the air preheater A and the air preheater B, the structure of the other unit is the same as the connection relation of the unit, the two units share the high-temperature flue gas three-way valve set device, the low-temperature flue gas three-way valve set device and the drying tower, the system can switch flue gas operation modes, and the wastewater treatment capacity is stable.

This application provides a monolithic 3D integrated chip, relating to the field of semiconductor technology, primarily addressing the problem that current resistive random access memory (RRAM)-based logic architectures remain relatively fixed and lack flexible reconfigurability. The monolithic 3D integrated chip includes a logic layer, a memory computing layer, and a reconfigurable layer stacked sequentially, with interconnections between these layers. The logic layer transmits computation signals and data to the memory computing layer and configuration data and signals to the reconfigurable layer. The memory computing layer, under the control of the computation signals, performs matrix multiplication or addition on the computation data and outputs the computation results. The reconfigurable layer, under the control of the configuration signals, performs reconfigurable processing on the computation results according to the configuration data. This application endows the chip with flexible programmability and reconfigurability.