Hardware compiling system applied to agile chip development
A compiling system and chip technology, which is applied in the field of hardware compiling systems, can solve problems such as poor maintainability, low development efficiency, and many repeated codes, and achieve the effect of improving development efficiency and reducing repeated codes
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Embodiment 1
[0028] Such as figure 1 , figure 2 , image 3 , Figure 4 as well as Figure 5 As shown, a hardware compilation system applied to agile chip development, including front-end and back-end, such as figure 1 As shown, the front end is used to convert the hardware description language HLHDL (High Level Hardware Description Language) into another hardware description language HCFIR (Hardware Compiler Framework Intermediate Representation); the back end is mainly used to convert the HCFIR language of the front end into Verilog language.
[0029] Preferably, the front-end is composed of a building block and a front-end conversion module;
[0030] Such as figure 2 The building blocks are shown. The building block is used to construct the high-level, highly abstract and highly parameterized HLHDL source code into HLHDL IR (abstract syntax tree form).
[0031] The building blocks consist of the following parts:
[0032] The first matching unit: the first matching unit is used...
Embodiment 2
[0054] combine figure 1 To further explain the workflow of this hardware compiler framework, it includes five steps:
[0055] Step S1: Convert HLHDL source code to HLHDL IR: First, for each node in the abstract syntax tree corresponding to the HLHDL source code, enter the first matching unit of the building module to identify which HLHDL IR type the node belongs to; then build the first information extraction unit of the module Extract the required information of this HLHDL IR type from this node and encapsulate it into a node in the form of HLHDL IR; the AST construction unit of the final building module repackages the node in the form of HLHDL IR into HLHDL IR (AST ).
[0056] Among them, the HLHDL IR types of this hardware compiler framework have five categories, and the encapsulation classes contained in each category are shown in Image 6 .
[0057] Step S2: HLHDL IR is converted into HCFIR code and stored in the .ir file: first, each node in HLHDL IR (AST) enters the ...
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