Four-pin integrated circuit packaging structure with heat dissipation

A technology of integrated circuits and packaging structures, applied in circuits, electrical components, electrical solid devices, etc., can solve the problems of difficult chip process size, inability to meet the signal transmission speed of smaller chips, anti-interference ability and heat dissipation performance, and achieve reduction Difficulty in wire bonding, maximizing the utilization rate of copper strips, and the effect of preventing separation

Pending Publication Date: 2019-06-25
江西芯诚微电子有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

With the development of smart products and wearable devices in the direction of smaller, thinner and lighter, the manufacturing process of chips is also developing from the micron level to the nano level. However, the lower the size of the chip manufacturing process, the more difficult it is. The advanced 10nm process is approaching the limit of what the equipment can achieve. If the equipment wants to be made smaller, thinner, and lighter, the

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  • Four-pin integrated circuit packaging structure with heat dissipation
  • Four-pin integrated circuit packaging structure with heat dissipation
  • Four-pin integrated circuit packaging structure with heat dissipation

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Embodiment Construction

[0033] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0034] The five-pin SMT package with heat dissipation proposed by the present invention is different from any existing package form, we call it Score4L package, it is smaller and thinner than the current SOP and SSOP, and is more suitable for large-scale SMT operations . Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0035] Such as figure 1 As shown, the length, width and thickness of ...

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Abstract

The invention provides a four-pin integrated circuit packaging structure with heat dissipation, which comprises an encapsulation structure composed of a base island, a lead pin, a heat dissipation pinand a plastic packaging body. The packaging structure is used for packaging a device with three to four ports. Gaps are reserved between a PIN1 and a PIN2, and between a PIN1 and a PIN2 and a PIN4 and the base island, thereby improving the voltage withstanding ability. The PIN3 is connected with the base island, the pin width is increased, laying of a grounding wire is facilitated, heat generatedwhen a chip works can be radiated through the PIN3 exposed outside, and the chip can be prevented from being overheated and burnt down. Each flow channel of the frame can be molded with four lead frame units left and right, and the molding compound utilization rate is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit packaging, in particular to an integrated circuit packaging structure with four pins for heat dissipation. Background technique [0002] Chip packaging is a technology that packs integrated circuits with insulating plastic or ceramic materials. It not only plays the role of placing, fixing, sealing, protecting chips and enhancing thermal conductivity, but also serves as a bridge between the internal world of the chip and the external circuit. With the development of smart products and wearable devices in the direction of smaller, thinner and lighter, the manufacturing process of chips is also developing from the micron level to the nano level. However, the lower the size of the chip manufacturing process, the more difficult it is. The advanced 10nm process is approaching the limit of what the equipment can achieve. If the equipment wants to be made smaller, thinner, and lighter, it can ...

Claims

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Application Information

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IPC IPC(8): H01L23/495H01L23/49
CPCH01L2224/05554H01L2224/48247H01L2224/48257
Inventor 肖国庆陈永金郑国昌
Owner 江西芯诚微电子有限公司
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