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A chip register code structure generation method and device and a storage medium

A technology of chip registers and registers, which is applied in the fields of instruments, calculations, electrical digital data processing, etc., can solve problems such as error-prone, low work efficiency, and labor-intensive work time

Pending Publication Date: 2019-07-05
SUZHOU POWERCORE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, the embodiment of the present invention provides a method for generating a chip register code structure to solve the problem of manual arrangement of tens of thousands of lines of relatively complex register codes, which is prone to errors and consumes a lot of manual work time. , which leads to the problem of low work efficiency

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  • A chip register code structure generation method and device and a storage medium
  • A chip register code structure generation method and device and a storage medium
  • A chip register code structure generation method and device and a storage medium

Examples

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Embodiment 1

[0064] An embodiment of the present invention provides a method for generating a chip register code structure, where the chip register code structure is a structure diagram formed by register codes, which is used in the development and design scenarios of the front-end or back-end of the chip, such as figure 1 As shown, the method for generating the chip register code structure includes the following steps:

[0065] Step S1: Obtain the first register code file of the code structure to be generated, and extract the register code parameters from the first register code file, and the first register code file is named according to the first preset format. The code structure to be generated here is the code structure diagram to be generated according to the first register code document, and the first register code document is the initial register code document designed by the code design engineer or the user. The code parameter of the code command, the first register code document ...

Embodiment 2

[0099] An embodiment of the present invention provides a device for generating a chip register code structure, such as Figure 8 shown, including:

[0100] The first acquiring module 81 is configured to acquire a first register code file of a code structure to be generated, and extract register code parameters from the first register code file, and the first register code file is named according to a first preset format.

[0101] The first generation module 82 is configured to generate a top-level module structure including multiple logical function sub-modules according to the register code parameters.

[0102] The exporting module 83 is configured to export a second register code file for presenting a logical hierarchical relationship between multiple logical function sub-modules according to the top-level module structure, and the second register code file is named according to a second preset format.

[0103] The second generating module 84 is configured to generate a cod...

Embodiment 3

[0135] An embodiment of the present invention provides a storage medium on which computer instructions are stored. When the instructions are executed by a processor, the steps of the method for generating the chip register code structure in Embodiment 1 are implemented. The storage medium also stores register code parameters, a register code structure to be generated, and the like. Wherein, the storage medium may be a magnetic disk, an optical disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a flash memory (Flash Memory), a hard disk (Hard Disk Drive) , HDD) or solid-state hard drive (Solid-State Drive, SSD), etc., the storage medium may also include a combination of the above-mentioned types of memory.

[0136] Those skilled in the art can understand that all or part of the processes in the methods of the above embodiments can be realized by controlling the relevant hardware through a computer program. The program can be st...

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Abstract

The invention discloses a chip register code structure generation method and device and a storage medium, and the method comprises the steps of obtaining a first register code document of a to-be-generated code structure, extracting register code parameters from the first register code document, and enabling the first register code document to be named according to a first preset format; generating a top layer module structure comprising a plurality of logic function sub-modules according to the register code parameters; according to the top layer module structure, exporting a second registercode document used for presenting a logic hierarchical relationship among the plurality of logic function sub-modules, and naming the second register code document according to a second preset format;and processing the content of the second register code document to generate a to-be-generated code structure. According to the present invention, the working efficiency of the code development or research of a code design engineer or a code design team at the front end or the rear end of a chip is facilitated, and the code design engineer can clearly know the code content information of each logic function sub-module at a glance.

Description

technical field [0001] The invention relates to the technical field of logic development of digital integrated circuits, in particular to a method, device and storage medium for generating a chip register code structure. Background technique [0002] With the rapid development of digital integrated circuit (Integrated Circuit, IC) design technology and manufacturing process, its complexity is increasing day by day. Correspondingly, the number of transistors contained in a single chip is increasing, for example: transistors integrated in IC chips Quantities range from tens of millions of gates to billions of gates. The development of digital integrated circuits, HDL design and verification, and software-driven development all belong to the category of logic design, and the description of registers runs through the entire logic design. Therefore, for each logic development team, maintaining and managing these increasingly more and more complex registers has become an importan...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/30Y02D10/00
Inventor 冯春阳王鹿刘刚徐黎谢延华宋伟伟
Owner SUZHOU POWERCORE TECH CO LTD
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