A FPGA-based multitasking system and method

Abstract

The present invention provides an FPGA-based multi-task processing system and method, the system comprising: an FPGA chip, a host and a PCIE interface, the PCIE interface is connected to the FPGA chip and the host, and a plurality of virtual channels are constructed between the FPGA chip and the host; The FPGA chip includes: DMA module, channel task allocator, task processor and channel task collector; DMA module exchanges data with the host through multiple virtual channels, and read / write requests for different virtual channels according to the predetermined priority relationship Control; the channel task distributor is used to receive the data packets of each virtual channel and distribute them to the task processor; the task processor is used to process the data packets in each virtual channel; the channel task collector is used to collect the data packets processed by the task processor And assign it to the corresponding virtual channel according to the predetermined rules. The invention can effectively improve the data transmission efficiency by constructing multiple virtual channels, and at the same time, solves the problem that the traditional single channel is prone to data congestion.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to an FPGA-based multi-task processing system and method. Background technique [0002] FPGA (Field-Programmable Gate Array), that is, Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It appeared as a semi-custom circuit in the field of application-specific integrated circuits, which not only solved the shortcomings of custom circuits, but also overcome the shortcomings of the limited number of original programmable device gates. [0003] As a high-speed data transmission bus and interface standard, PCIE (peripheral component interconnect express) is usually used to connect FPGAs and host processors. Since PCIE itself does not support multi-channel data transmission and processing, when there are a large number of tasks in the system that require transmission and processing , Single-channel data tr...

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Problems solved by technology

[0003] As a high-speed data transmission bus and interface standard, PCIE (peripheral component interconnect express) is usually used to connect FPGA and host processor. Since PCIE itself does not support multi-channel data transmission and processing, when there are a large number of tasks in the system that need to be transmitted and processed , single-channel data transmission is likely to cause data congestion, and DMA is performed sequentially when reading / writing data, which is not conducive to hierarchical management of data transmission and processing

In addition, if there is a large amount of task data occupying the front end of the data stream, the data of other tasks can only be transmitted after the task data transmission is completed, which will easily cause some processing units in the FPGA to be in an idle state, and the resource utilization rate is not high.

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