Communication processor

Abstract

The invention provides a communication processor. The communication processor comprises a scalar processing module and a microcode processing module connected with the scalar processing module, and the microcode processing module comprises an interleaving unit which comprehensively supports data interleaving, a bus interface unit, a computing unit, a register file stack unit, an instruction fetchdecoding unit, a circulation control unit and a microcode program control unit. At least one internal register is arranged in each unit included in the microcode processing module, and the microcode processing module further comprises an interleaving bus and a bypass network, and an internal register of each unit of the microcode processing module performs data interaction through the interleavingbus. According to the invention, the independent internal register is arranged in each unit to reduce the time delay when each unit accesses the associated data and improve the data access speed of each unit, and the interleaving unit comprehensively supports the data interleaving, so that the data access and use process is more flexible.

Description

technical field [0001] The invention relates to the field of processors, in particular to a communication processor. Background technique [0002] In modern communication processors, the register file has become an important part, affecting the overall performance of the processor. Only one general-purpose register file is set in a traditional communication processor. When multiple units in the processor access only one general-purpose register file, the access efficiency of the general-purpose register file is greatly reduced, which will cause the reading of associated data in each unit Writing, writing and writing cause delay, which seriously affects the processing speed and processing performance of the processor. [0003] At present, in order to reduce the above delay, various optimizations and extensions have been made for the processing performance of the registers in the processor in the prior art, but the expansion of the register file usually leads to a decrease in...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a communication processor aiming at the bottleneck of the prior art, which can solve the problems of the communication processor in the prior art, such as slow processing speed and poor data access flexibility when processing data

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