Read-write control module and method for same port and dual-port memory

Abstract

The invention discloses a read-write control module and method for the same port and a dual-port memory. The read-write control module aiming at the same port can generate each stage of delay of the clock delay generation module by configuring the clock delay; the reading time sequence and the writing time sequence are regulated and controlled; therefore, the read-write pulse generation module generates a read pulse signal and a write pulse signal which are staggered in time sequence, a port read-write control signal generated by the read-write control signal generation module performs read orwrite control on the read pulse signal and the write pulse signal respectively, and a word line control signal is generated in the word line control signal generation module, wherein the read pulse signal and the write pulse signal respectively comprise a plurality of read pulses and write pulses which are periodically distributed in time; the number of read pulses and write pulses in a period can be flexibly set according to actual read-write needs, so that word line control signals in different modes are generated, data can be read and written in sequence in a clock period, the structure issimple, regulation and control are convenient and efficient, and the data has high real-time performance.

Description

technical field [0001] The disclosure belongs to the technical field of read-write control of memory data, and relates to a read-write control module and method for the same port, and a dual-port memory. Background technique [0002] Memory is one of the commonly used devices in digital systems. Dual port memories typically have two ports and an array of memory cells that can be accessed simultaneously from the ports if the memory cells accessed from one side are different from the memory cells on the other side. [0003] At the same time, the high-speed data acquisition and processing system has high requirements for the processing ability of a large amount of multi-variable data and the real-time performance of the system. In some data storage applications, a dual-port memory implementation is required to read old data before writing new data. [0004] In the prior art, if the dual-port memory wants to realize the function of reading old data first and then writing new d...

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Problems solved by technology

[0004] In the prior art, if the dual-port memory wants to realize the function of reading out the old data first and then writing the new data, there are two methods. One is to use two ports to realize it. At this time, one of the ports reads out the old data first. , and the other port writes new data, this method occupies the port resources of the dual-port memory, which adversely affects the ability of the memory to process data; one is to use one port, but it takes two clock cycles to complete , that is, two clock cycles are used to realize the function of reading old data first and then writing new data, which reduces the real-time performance of data

[0005] Therefore, for the dual-port memory, the main technical defect of the existing read-write control method is: one, adopt the mode of two ports to occupy the port resources of the dual-port memory, so that the dual-port memory becomes a practical single Port memory, in addition, the data read and written will appear in different physical ports, which makes the hardware design more complicated; second, the use of one port and two clock cycles reduces the real-time performance of data

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